IP Library Granted Patent US 9,167,683
Granted Patent B2
US 9,167,683 · App. 14/603,548 · Granted Oct 20, 2015

Printed circuit boards including strip-line circuitry and methods of manufacturing same

Inventors: Wayne L. Moul (Loveland, CO); Robert J. Behnke, II (Erie, CO); Scott E. M. Frushour (Boulder, CO); Jeffrey L. Jensen (Boulder, CO)
Assignee: Covidien LP
H05K1/0218H01P3/088H01P11/003H05K1/0243H05K1/0298H05K1/183H05K1/025H05K1/0225H05K1/0231H05K1/186H05K3/4611H05K2201/066H05K2201/0715H05K2201/0723H05K2201/0969H05K2203/063
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,167,683
App. No.
14/603,548
Granted
Oct 20, 2015
Kind
B2
Abstract

A printed circuit board includes a first layer stack and a second layer stack coupled to the first layer stack. The first layer stack includes a first electrically-insulating layer, a first electrically-conductive layer, and a cut-out area defining a void that extends therethrough. The first electrically-insulating layer includes a first surface and an opposite second surface. The first electrically-conductive layer is disposed on the first surface of the first electrically-insulating layer. The second layer stack includes a second electrically-insulating layer. The second electrically-insulating layer includes a first surface and an opposite second surface. One or more electrically-conductive traces are disposed on the first surface of the second electrically-insulating layer. The printed circuit board further includes a device at least partially disposed within the cut-out area. The device is electrically-coupled to one or more of the one or more electrically-conductive traces disposed on the first surface of the second electrically-insulating layer.

Claims (21)

1. A printed circuit board, comprising:

a first layer stack including:

a first electrically-insulated layer;

a first electrically-conductive layer; and

a cut-out area defining a void that extends through the first layer stack;

a second layer stack coupled to the first layer stack and including a second electrically-insulated layer;

a third electrically-insulated layer disposed in association with the first electrically-conductive layer;

a circuit at least partially disposed within the cut-out area;

a first signal layer disposed between the first and second electrically-insulated layers; and

a second signal layer associated with the third electrically-insulated layer and electrically coupled with the first signal layer by a via hole.

2. The printed circuit board according to claim 1 , wherein the cut-out area extends from the first signal layer to an opening defined in the second signal layer.

3. The printed circuit board according to claim 1 , wherein the second signal layer is disposed on the third electrically-insulated layer and the third electrically-insulated layer is disposed on the first electrically-conductive layer.

4. The printed circuit board according to claim 3 , wherein the first signal layer includes a conductive trace and the second signal layer includes a conductive trace electrically coupled to the conductive trace of the first signal layer through the via hole.

5. The printed circuit board according to claim 1 , wherein the circuit is electrically coupled to the first signal layer.

6. The printed circuit board according to claim 1 , further comprising two devices electrically coupled to one another and disposed in association with the second signal layer.

7. The printed circuit board according to claim 6 , wherein at least one device of the two devices is electrically coupled to the circuit by the first signal layer.

8. The printed circuit board according to claim 1 , wherein the second layer stack further includes a second electrically-conductive layer disposed on the second electrically-insulated layer.

9. The printed circuit board according to claim 8 , further comprising a third layer stack coupled to the second electrically-conductive layer.

10. The printed circuit board according to claim 1 , wherein a height of the circuit is greater than a height of the first layer stack.

11. The printed circuit board according to claim 1 , further comprising at least one gap area disposed in adjoining relation to the cut-out area.

12. The printed circuit board according to claim 11 , wherein the at least one gap area is configured to at least one of physically isolate the circuit from the first electrically-conductive layer or electrically isolate the circuit from the first electrically-conductive layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2015
From: MOUL, WAYNE L.; BEHNKE, ROBERT J., II; FRUSHOUR, SCOTT E.M.; JENSEN, JEFFREY L.
To: TYCO HEALTHCARE GROUP LP
Reel/Frame 034797/0279 →
CHANGE OF NAME Recorded Jan 23, 2015
From: TYCO HEALTHCARE GROUP LP
To: COVIDIEN LP
Reel/Frame 034807/0125 →
Continuity (2)
Continuation 13352978 · Jan 18, 2012
Related Publication 20150131246A1 · May 14, 2015