Group signaling using synthetic media access control addresses

1. A system for group messaging, comprising:

a memory; and

a processor, coupled to the memory, configured, based on instructions stored in the memory, to:

assign a first synthetic Media Access Control (synMAC) address to a first group of devices of a plurality of devices,

assign a second synMAC address to a second group of devices of the plurality of devices, and

send a message including the first synMAC address to the first and the second group of devices, the first synMAC address being configured to be accepted by the first group of devices and to be discarded by the second group of devices.

2. The system of claim 1 , wherein the first and the second synMAC addresses are distinct from respective unique Media Access Control (MAC) addresses of each of the plurality of devices.

3. The system of claim 1 , wherein the processor is further configured, based on the instructions stored in the memory, to broadcast the message to the plurality of devices.

4. The system of claim 1 , wherein the processor is further configured, based on the instructions stored in the memory, to:

write the first synMAC address in respective memories of the first group of devices, and

write the second synMAC address in respective memories of the second group of devices.

5. The system of claim 1 , wherein the processor is further configured, based on the instructions stored in the memory, to install software on the plurality of devices to parse messages that include the first or the second synMAC addresses.

6. The system of claim 1 , wherein the processor is further configured, based on the instructions stored in the memory, to send the message that includes the first synMAC address to devices of the plurality of devices that implement one or both of: a Media Access Control (MAC) addressing scheme and a synMAC addressing scheme.

7. The system of claim 1 , wherein the processor is further configured, based on the instructions stored in the memory, to assign the first and the second synMAC addresses to a third group of devices of the plurality of devices.

8. The system of claim 7 , wherein the processor is further configured, based on the instructions stored in the memory, to send a second message including the first and the second synMAC address to the first, the second, and the third group of devices,

wherein the third group of devices is configured to accept and to process the second message, and

wherein the first group of devices and the second group of devices are configured to discard the second message.

9. A device, comprising:

a memory; and

a processor, coupled to the memory, configured, based on instructions stored in the memory, to:

receive a first message assigning a first synthetic Media Access Control (synMAC) address to the device,

store the first synMAC address in the memory,

receive a second message,

determine whether the second message includes a Media Access Control (MAC) address or a second synMAC address,

process the second message when the MAC address corresponds to a MAC address associated with the device, and

process the second message when the second synMAC address is equal to the first synMAC address.

10. The device of claim 9 , wherein the processor is further configured, based on the instructions stored in the memory, to receive a third message assigning an additional synMAC address to the device.

11. The device of claim 10 , wherein the processor is further configured, based on the instructions stored in the memory, to:

receive a fourth message, and

process the fourth message when the fourth message includes a synMAC address that is equal to the first synMAC address or the additional synMAC address.

12. The device of claim 9 , wherein the processor is further configured, based on the instructions stored in the memory, to receive and to process a third message to install software to parse messages that include the first synMAC address.

13. A device, comprising:

a memory; and

a processor, coupled to the memory, configured, based on instructions stored in the memory, to:

receive a first message that assigns a first synthetic Media Access Control (synMAC) address to the device,

store the first synMAC address in the memory,

receive a second message,

accept the second message if the first synMAC address is equal to a second synMAC address included in the second message,

receive a third message, and

discard the third message if the first synMAC address is not equal to a third synMAC address included in the third message.

14. The device of claim 13 , wherein the processor is further configured, based on the instructions stored in the memory, to accept and to store the second synMAC address.

15. The device of claim 14 , wherein the processor is further configured, based on the instructions stored in the memory, to accept a fourth message if a fourth synMAC address included in the fourth message is equal to the first synMAC address or the second synMAC address.

16. The device of claim 14 , wherein the processor is further configured, based on the instructions stored in the memory, to parse, upon receiving the second message, the second message to determine the presence of the second synMAC address in the second message.

17. The device of claim 14 , wherein the processor is further configured, based on the instructions stored in the memory, to accept and to install software to parse and to process messages that include synMAC addresses.

18. The device of claim 14 , wherein the second message includes the first synMAC address and the second synMAC address, each of the first and the second synMAC addresses being associated with a corresponding action, and

wherein a first action associated with the first synMAC address is executed before a second action associated with the second synMAC address if the first synMAC address is associated with a higher priority level than the second synMAC address.

19. The device of claim 14 , wherein the second message includes the first synMAC address and the second synMAC address, each of the first and the second synMAC addresses being associated with corresponding actions, and

wherein a first action associated with the first synMAC address and a second action associated with the second synMAC address are executed if the first and the second synMAC addresses are associated with a same priority level.