IP Library Patent Application 14614426
Patent Application
App. No. 14/614,426

METHOD AND APPARATUS FOR ENTROPY ENCODING AND DECODING

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Patent No.
US None
App. No.
14/614,426
Abstract

A method for encoding and decoding data includes obtaining sets of pixels from transformed data. A linear index address is obtained from an address of the pixels to obtain a memory transformed address. The memory transformed address is used to obtain a set size of the pixels. Based on the set size and a threshold value, the pixel type is identified from a list of pixel types. Based on the pixel type, a bit stream having a refinement bit is generated.

Claims (33)

1 . A method for encoding data using a wavelet based entropy encoder, the method comprising:

partitioning the data, by a set partitioning unit, into a plurality of sets;

obtaining, by an address control and generation unit (ACGU), a set size of the plurality of sets based on a transformed memory address of one or more pixels in the plurality of sets;

scanning, by a pixel tester unit, in accordance with the set size, the plurality of sets in a single pass, wherein the single pass comprises a plurality of scanning passes;

identifying, by the pixel tester unit, a type of the one or more pixels from a list of pixel type based on a threshold value generated by the single pass; and

generating in the single pass, by a main core control unit, a bit stream, wherein the bit stream comprises encoded data, and wherein the encoded data includes at least one of a significant bit and a refinement bit.

2 . The method of claim 1 , wherein the set size is used to decode a next address for the one or more pixels.

3 . The method of claim 1 , wherein the transformed memory address is obtained by applying a linear indexing on the one or more pixels.

4 . The method of claim 1 , wherein the list of pixel type comprises at least one of a refinement pixel, a significant pixel and an insignificant pixel.

5 . The method of claim 1 , wherein the scanning passes comprise a refinement pass and a sorting pass.

6 . The method of claim 1 , wherein the threshold value includes a value of a highest significant bit in the one or more pixels in the plurality of sets.

7 . The method of claim 1 , wherein the significant bit and the refinement bit in the bit stream are arranged in one of a random order and a sequential order.

8 . An apparatus for encoding image data, the apparatus comprising:

an address control and generation unit (ACGU) for obtaining a set size based on a transformed memory address of a plurality of pixels in a plurality of sets associated with the image data, wherein the set size is used to decode a next address for the plurality of pixels;

a pixel tester unit coupled to the ACGU that (i) scans, in accordance with the set size, the plurality of sets in a single pass, wherein the single pass includes one or more scanning passes, and (ii) identifies a type of the plurality of pixels from a list of pixel types based on a threshold value; and

a main control core unit, coupled to the ACGU and the pixel tester unit, for generating a bit stream of encoded image data in the single pass, wherein the encoded image data has at least one of a significant bit and a refinement bit.

9 . The apparatus of claim 8 , wherein the ACGU comprises:

a priority encoder having one or more shift registers for obtaining a linear address of the plurality of pixels; and

a linear address to memory address converter for transforming the linear address into the transformed memory address.

10 . The apparatus of claim 8 , wherein the pixel tester unit comprises:

a check refinement block for checking for a refinement pixel from the list of pixel types based on the threshold value;

a check significant block for checking for a significant pixel from the list of pixel types based on the threshold value; and

a bit generator for generating an encoded bit stream output signal in accordance with the refinement bit, the significant bit and an insignificant bit.

11 . The apparatus of claim 8 , further comprising a bit rate control unit for controlling a rate of the generated bit stream.

12 . The apparatus of claim 8 , further comprising a stream buffer unit for starting and stopping generation of the bit stream.

13 . The apparatus of claim 8 , wherein the ACGU and the main control core unit collectively form a set partitioning unit that partitions the image data into the plurality of sets.

14 . The apparatus of claim 8 , wherein the list of pixel types comprises at least one of a refinement pixel, a significant pixel, and an insignificant pixel.

15 . The apparatus of claim 8 , wherein the one or more scanning passes in the single pass comprises a refinement pass and a sorting pass.

16 . The apparatus of claim 8 , wherein the threshold value includes a value of a highest significant bit in the plurality of pixels in the set.

17 . The apparatus of claim 8 , wherein the significant bit and the refinement bit in the bit stream are arranged in at least one of a random order and a sequential order.

18 . An apparatus for decoding encoded data provided as a bit stream comprising a plurality of bits, the apparatus comprising:

a pixel tester unit for identifying, in the plurality of bits, a pixel type from a list of pixel type based on a threshold value; and

a data generator unit for generating decoded data based on the identified pixel type.

Assignments (15)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2015
From: IQBAL, SYED SHAKIR
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 034902/0098 →