IP Library Granted Patent US 9,607,583
Granted Patent B2
US 9,607,583 · App. 14/614,517 · Granted Mar 28, 2017

Display controller device having a debug interface

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Quick Facts
Patent No.
US 9,607,583
App. No.
14/614,517
Granted
Mar 28, 2017
Kind
B2
Abstract

A display controller device for processing image data has a data processor for generating a display signal. The device has a writeback unit having an input coupled to the display signal and an output coupled to a debug interface. The writeback unit has a slice controller for defining a set of slices of the image and consecutively selecting slices of the set, and a slice selector for sampling pixel data from a selected slice. A slice buffer is coupled between the slice selector and the debug output for temporarily storing the selected pixel data. The slice controller transfers the selected pixel data to the debugger and subsequently selects a next slice until all slices of the set have been transferred. The debug system receives the slices and regenerates and displays the image.

Claims (45)

1. A display controller device for processing image data, the display controller device comprising a data processor for generating a display signal representing an image, a display output for connecting the display signal to a display, a debug interface and a writeback unit having an input coupled to the display signal and an output coupled to the debug interface, the writeback unit comprising:

a slice controller for defining a set of slices of the image and consecutively selecting slices of the set, wherein the slice controller is arranged to receive commands from a debug system, the commands comprising a slice setup command for defining the set of slices of the image,

a slice selector coupled to the slice controller for selecting pixel data from the display signal for a selected slice,

a slice buffer coupled between the slice selector and the debug interface for temporarily storing the selected pixel data until the selected pixel data of the selected slice has been transferred via the debug interface,

the slice controller being arranged to transfer the selected pixel data of the selected slice and subsequently select a next slice until all slices of the set have been selected and transferred.

2. The display controller device as claimed in claim 1 , wherein the slice controller is arranged to force the data processor to keep the display signal representing the same image until all slices of the set have been selected and transferred.

3. The display controller device as claimed in claim 1 , wherein the slice controller is arranged to receive a transfer setup command from the debug system, the transfer setup command defining parameters of the transfer the selected pixel data of the selected slice.

4. The display controller device as claimed in claim 1 , wherein the device comprises a boundary scan interface for testing the device, and the debug interface is comprised in the boundary scan interface.

5. The display controller device as claimed in claim 1 , wherein the slice controller is arranged to receive an area command from the debug system, the area command defining an area of the image that is to be captured next via the set of slices.

6. The display controller device as claimed in claim 5 , wherein the area command is defining the area of the image by at least one of an X position, an Y position, a width, a height.

7. The display controller device as claimed in claim 1 , wherein the slice controller is arranged to provide at least one status signal to the debug system.

8. The display controller device as claimed in claim 7 , wherein the slice controller is arranged to provide a transfer status signal indicating that the slice buffer is ready to transfer the selected pixel data of the selected slice.

9. The display controller device as claimed in claim 7 , wherein the slice controller is constructed to provide the at least one status signal in a register that is accessible for the debug system.

10. The display controller device as claimed in claim 1 , wherein the debug interface of the display controller device is provided for coupling to the debug system comprising:

a debug system interface for coupling to the debug interface of the display controller device,

the display for displaying the image, and

a debug processor arranged to receive the set of slices of the image and display the image by

receiving selected pixel data of a respective slice and subsequently receiving the next slice until all slices have been transferred, and

regenerating the image from the received slices.

11. The display controller device as claimed in claim 10 , wherein the debug processor is arranged to force, via the debug interface, the data processor in the display controller device to keep the display signal representing the same image until all slices of the set have been selected and transferred.

12. The display controller device as claimed in claim 10 , wherein the debug processor is arranged to transfer commands to the slice controller, the commands comprising at least one of

a slice setup command for defining the set of slices of the image;

an area command, the area command defining an area of the image that is to be captured next via the set of slices;

a transfer setup command, the transfer setup command defining parameters of the transfer the selected pixel data of the selected slice.

13. The display controller device as claimed in claim 10 , wherein the debug system is arranged to receive at least one status signal from the slice controller,

the at least one status signal from the slice controller being received via a register in the display controller device that is accessible for the debug system.

14. The display controller device as claimed in claim 10 , wherein the debug system comprises a boundary scan interface for testing the device, and the debug interface is comprised in the boundary scan interface.

15. A method of accessing a display controller device, the method comprising:

defining a set of slices of an image and consecutively selecting slices of the set,

selecting pixel data from a display signal representing the image for a selected slice,

temporarily storing the selected pixel data until the selected pixel data of the selected slice has been transferred via a debug interface,

transferring the selected pixel data of the selected slice and subsequently selecting a next slice via the debug interface until all slices of the set have been selected and transferred, and

at a debug system, receiving the set of slices of the image by:

receiving selected pixel data of a respective slice and subsequently receiving the next slice until all slices have been received,

regenerating the image from received slices, and

displaying the image by regenerating the image from the received slices.

16. A writeback unit comprising:

a slice controller for defining a set of slices of an image and consecutively selecting slices of the set, wherein the slice controller is arranged to receive commands from a debug system, the commands comprising a slice setup command for defining the set of slices of the image,

a slice selector coupled to the slice controller for selecting pixel data from a display signal representing the image for a selected slice,

a slice buffer coupled between the slice selector and the debug interface for temporarily storing the selected pixel data until the selected pixel data of the selected slice has been transferred via the debug interface,

the slice controller being arranged to transfer the selected pixel data of the selected slice and subsequently select a next slice until all slices of the set have been selected and transferred.

17. The display controller device as claimed in claim 16 , wherein the slice controller is arranged to force the data processor to keep the display signal representing the same image until all slices of the set have been selected and transferred.

18. The display controller device as claimed in claim 16 , wherein the slice controller is arranged to receive a transfer setup command from the debug system, the transfer setup command defining parameters of the transfer the selected pixel data of the selected slice.

19. The display controller device as claimed in claim 16 , wherein the slice controller is arranged to receive an area command from the debug system, the area command defining an area of the image that is to be captured next via the set of slices.

20. The display controller device as claimed in claim 19 , wherein the area command is defining the area of the image by at least one of an X position, an Y position, a width, a height.

Assignments (15)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0341 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0359 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0974 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0080 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0112 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0095 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2015
From: STAUDENMAIER, MICHAEL ANDREAS; AUBINEAU, VINCENT; BRIANT, YVES
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 034893/0825 →