IP Library Granted Patent US 9,318,609
Granted Patent B2
US 9,318,609 · App. 14/620,209 · Granted Apr 19, 2016

Semiconductor device with epitaxial structure

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Quick Facts
Patent No.
US 9,318,609
App. No.
14/620,209
Granted
Apr 19, 2016
Kind
B2
Abstract

A semiconductor device includes a fin structure, an isolation structure, a gate structure and an epitaxial structure. The fin structure protrudes from the surface of the substrate and includes a top surface and two sidewalls. The isolation structure surrounds the fin structure. The gate structure overlays the top surface and the two sidewalls of a portion of the fin structure, and covers a portion of the isolation structure. The isolation structure under the gate structure has a first top surface, and the isolation structure at two sides of the gate structure has a second top surface. The first top surface is higher than the second top surface. The epitaxial layer is disposed at one side of the gate structure and is in direct contact with the fin structure.

Claims (16)

1. A semiconductor device, comprising:

a fin structure, protruding from a surface of a substrate, wherein the fin structure comprises a top surface and two side surfaces;

an isolation structure, disposed on the surface of the substrate and surrounding the fin structure;

a gate structure, overlaying the top surface and the two side surfaces of a portion of the fin structure and covering a portion of the isolation structure, wherein the isolation structure under the gate structure has a first top surface and the isolation structure at two sides of the gate structure has a second top surface, and the first top surface is higher than the second top surface; and

an epitaxial layer, disposed at one side of the gate structure and in direct contact with the fin structure.

2. The semiconductor device according to claim 1 , wherein there is a height difference between the first top surface and second top surface, and the height difference ranges from 100 Angstroms to 250 Angstroms.

3. The semiconductor device according to claim 1 , wherein the gate structure is a metal gate structure.

4. The semiconductor device according to claim 1 , wherein the isolation structure under the gate structure comprises a sidewall and the epitaxial structure is in direct contact with the sidewall.

5. The semiconductor device according to claim 1 , further comprising a recess formed at one end of the fin structure, wherein the epitaxial structure fills up the recess.

6. The semiconductor device according to claim 5 , wherein a bottom surface of the epitaxial structure is shallower than a bottom surface of the isolation structure.

7. The semiconductor device according to claim 6 , wherein there is a height difference between the bottom surface of the epitaxial structure and the bottom surface of the isolation structure, and the height difference ranges from 100 Angstroms to 250 Angstroms.

8. The semiconductor device according to claim 1 , wherein the epitaxial structure comprises silicon germanium, silicon phosphide or phosphor-doped silicon carbide.

9. The semiconductor device according to claim 1 , further comprising a spacer disposed on a sidewall of the gate structure.

10. The semiconductor device according to claim 1 , further comprising:

another epitaxial structure, disposed at another side of the gate structure and in direct contact with the fin structure; and

a channel region, contiguous to the top surface and the side surfaces of the fin structure, and between the epitaxial structure and said another epitaxial structure.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2023
From: UNITED MICROELECTRONICS CORPORATION
To: MARLIN SEMICONDUCTOR LIMITED
Reel/Frame 065294/0055 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2015
From: HUNG, YU-HSIANG; FU, SSU-I; CHANG, CHUNG-FU; CHEN, CHENG-GUO; LIN, CHIEN-TING
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 034954/0176 →