Differential amplification circuit and semiconductor integrated circuit

1. A differential amplification circuit comprising:

a first transistor and a second transistor which form a differential pair;

a first load and a second load which are connected between drains of the first transistor and the second transistor, and one of power source lines, respectively;

current sources which are connected between sources of the first transistor and the second transistor, and the other of the power source lines, respectively; and

a resistor circuit which is connected between the sources of the first transistor and the second transistor, wherein

the resistor circuit includes:

a coarse adjustment part configured to change a resistance value of the resistor circuit in intervals equal to or greater than a first value; and

a fine adjustment part configured to change the resistance value of the resistor circuit in intervals equal to or less than a second value, the second value being smaller than the first value,

one of the coarse adjustment part and the fine adjustment part includes a first lateral adjustment part and a second lateral adjustment part which have the same circuit configuration,

one side of the first lateral adjustment part is connected to a central adjustment part, and the other side of the first lateral adjustment part is connected to the source of the first transistor,

one side of the second lateral adjustment part is connected to the central adjustment part, and the other side of the second lateral adjustment part is connected to the source of the second transistor,

the first lateral adjustment part and the second lateral adjustment part are symmetrically connected to both sides of the central adjustment part,

the central adjustment part is the other of the coarse adjustment part and the fine adjustment part,

the central adjustment part has a circuit configuration symmetrical with respect to two connection nodes with the first lateral adjustment part and the second lateral adjustment part,

the central adjustment part includes a plurality of central adjustment units which are connected in parallel, and

each of the central adjustment units includes a central switch and two central resistors which are connected to both sides of the central switch.

2. The differential amplification circuit according to claim 1 , wherein

each of the first lateral adjustment part and the second lateral adjustment part includes a plurality of lateral adjustment units which are connected in parallel,

each of the lateral adjustment units includes a lateral switch and a lateral resistor which is connected to the lateral switch,

the lateral switches and the lateral resistors of the first lateral adjustment part and the second lateral adjustment part are arranged symmetrically with respect to the central adjustment part.

3. The differential amplification circuit according to claim 2 , wherein,

one of the lateral switches in the first lateral adjustment part and corresponding one of the lateral switches in the second lateral adjustment part are turned on or off at the same time.

4. The differential amplification circuit according to claim 1 , wherein

each of the first lateral adjustment part and the second lateral adjustment part includes a plurality of lateral adjustment units which are connected in parallel,

each lateral adjustment unit includes a lateral switch and a lateral resistor which is connected to the lateral switch,

the lateral switches and the lateral resistors of the first lateral adjustment part and the second lateral adjustment part are arranged symmetrically with respect to the central adjustment part.

5. The differential amplification circuit according to claim 4 , wherein,

one of the lateral switches in the first lateral adjustment part and corresponding one of the lateral switches in the second lateral adjustment part are turned on or off at the same time.

6. A semiconductor integrated circuit comprising:

a differential amplification circuit, the gain of which changes in accordance with control data;

a control circuit configured to output a gain adjustment code of the differential amplification circuit; and

a decoder configured to convert the gain adjustment code into the control data and to apply the control data to the differential amplification circuit,

the differential amplification circuit includes:

a first transistor and a second transistor which form a differential pair;

a first load and a second load which are connected between drains of the first transistor and the second transistor, and one of power source lines, respectively;

current sources which are connected between sources of the first transistor and the second transistor, and the other of the power source lines, respectively; and

a resistor circuit which is connected between the sources of the first transistor and the second transistor, wherein

the resistor circuit includes:

a coarse adjustment part configured to change a resistance value of the resistor circuit in intervals equal to or greater than a first value; and

a fine adjustment part configured to change the resistance value of the resistor circuit in intervals equal to or less than a second value, the second value being smaller than the first value,

one of the coarse adjustment part and the fine adjustment part includes a first lateral adjustment part and a second lateral adjustment part which have the same circuit configuration,

one side of the first lateral adjustment part is connected to a central adjustment part, and the other side of the first lateral adjustment part is connected to the source of the first transistor,

one side of the second lateral adjustment part is connected to the central adjustment part, and the other side of the second lateral adjustment part is connected to the source of the second transistor,

the first lateral adjustment part and the second lateral adjustment part are symmetrically connected to both sides of the central adjustment part,

the central adjustment part is the other of the coarse adjustment part and the fine adjustment part,

the central adjustment part has a circuit configuration symmetrical with respect to two connection nodes with the first lateral adjustment part and the second lateral adjustment part,

the central adjustment part includes a plurality of central adjustment units which are connected in parallel, and

each of the central adjustment units includes a central switch and two central resistors which are connected to both sides of the central switch.

7. The semiconductor integrated circuit according to claim 6 , wherein

each of the first lateral adjustment part and the second lateral adjustment part includes a plurality of lateral adjustment units which are connected in parallel,

each of the lateral adjustment units includes a lateral switch and a lateral resistor which is connected to the lateral switch,

the lateral switches and the lateral resistors of the first lateral adjustment part and the second lateral adjustment part are arranged symmetrically with respect to the central adjustment part.

8. The semiconductor integrated circuit according to claim 7 , wherein

one of the lateral switches in the first lateral adjustment part and corresponding one of the lateral switches in the second lateral adjustment part are turned on or off at the same time.

9. The semiconductor integrated circuit according to claim 6 , wherein

each of the first lateral adjustment part and the second lateral adjustment part includes a plurality of lateral adjustment units which are connected in parallel,

each of the lateral adjustment units includes a lateral switch and a lateral resistor which is connected to the lateral switch,

the lateral switches and the lateral resistors of the first lateral adjustment part and the second lateral adjustment part are arranged symmetrically with respect to the central adjustment part.

10. The semiconductor integrated circuit according to claim 9 , wherein,

one of the lateral switches in the first lateral adjustment part and corresponding one of the lateral switches in the second lateral adjustment part are turned on or off at the same time.

11. A differential amplification circuit comprising:

a first transistor and a second transistor which form a differential pair;

a first load and a second load which are connected between drains of the first transistor and the second transistor, and one of power source lines, respectively;

current sources which are connected between sources of the first transistor and the second transistor, and the other of the power source lines, respectively; and

a resistor circuit which is connected between the sources of the first transistor and the second transistor, wherein

the resistor circuit includes:

a coarse adjustment part configured to change a resistance value of the resistor circuit in intervals equal to or greater than a first value; and

a fine adjustment part configured to change the resistance value of the resistor circuit in intervals equal to or less than a second value, the second value being smaller than the first value,

one of the coarse adjustment part and the fine adjustment part includes a first lateral adjustment part and a second lateral adjustment part which have the same circuit configuration,

one side of the first lateral adjustment part is connected to a central adjustment part, and the other side of the first lateral adjustment part is connected to the source of the first transistor,

one side of the second lateral adjustment part is connected to the central adjustment part, and the other side of the second lateral adjustment part is connected to the source of the second transistor,

the first lateral adjustment part and the second lateral adjustment part are symmetrically connected to both sides of the central adjustment part,

the central adjustment part is the other of the coarse adjustment part and the fine adjustment part,

the central adjustment part has a circuit configuration symmetrical with respect to two connection nodes with the first lateral adjustment part and the second lateral adjustment part,

each of the first lateral adjustment part and the second lateral adjustment part includes a plurality of lateral adjustment units which are connected in parallel,

each of the lateral adjustment units includes a lateral switch and a lateral resistor which is connected to the lateral switch, and

the lateral switches and the lateral resistors of the first lateral adjustment part and the second lateral adjustment part are arranged symmetrically with respect to the central adjustment part.

12. The differential amplification circuit according to claim 11 , wherein

one of the lateral switches in the first lateral adjustment part and corresponding one of the lateral switches in the second lateral adjustment part are turned on or off at the same time.

13. A semiconductor integrated circuit comprising:

a differential amplification circuit, the gain of which changes in accordance with control data;

a control circuit configured to output a gain adjustment code of the differential amplification circuit; and

a decoder configured to convert the gain adjustment code into the control data and to apply the control data to the differential amplification circuit,

the differential amplification circuit includes:

a first transistor and a second transistor which form a differential pair;

a first load and a second load which are connected between drains of the first transistor and the second transistor, and one of power source lines, respectively;

current sources which are connected between sources of the first transistor and the second transistor, and the other of the power source lines, respectively; and

a resistor circuit which is connected between the sources of the first transistor and the second transistor, wherein

the resistor circuit includes:

a coarse adjustment part configured to change a resistance value of the resistor circuit in intervals equal to or greater than a first value; and

a fine adjustment part configured to change the resistance value of the resistor circuit in intervals equal to or less than a second value, the second value being smaller than the first value,

one of the coarse adjustment part and the fine adjustment part includes a first lateral adjustment part and a second lateral adjustment part which have the same circuit configuration,

one side of the first lateral adjustment part is connected to a central adjustment part, and the other side of the first lateral adjustment part is connected to the source of the first transistor,

one side of the second lateral adjustment part is connected to the central adjustment part, and the other side of the second lateral adjustment part is connected to the source of the second transistor,

the first lateral adjustment part and the second lateral adjustment part are symmetrically connected to both sides of the central adjustment part,

the central adjustment part is the other of the coarse adjustment part and the fine adjustment part,

the central adjustment part has a circuit configuration symmetrical with respect to two connection nodes with the first lateral adjustment part and the second lateral adjustment part,

each of the first lateral adjustment part and the second lateral adjustment part includes a plurality of lateral adjustment units which are connected in parallel,

each of the lateral adjustment units includes a lateral switch and a lateral resistor which is connected to the lateral switch, and

the lateral switches and the lateral resistors of the first lateral adjustment part and the second lateral adjustment part are arranged symmetrically with respect to the central adjustment part.

14. The semiconductor integrated circuit according to claim 13 , wherein

one of the lateral switches in the first lateral adjustment part and corresponding one of the lateral switches in the second lateral adjustment part are turned on or off at the same time.