PULSE TRANSLATION MODULATION FOR POWER CONVERTERS
A control method is provided for a power converter comprising a switched power stage configured to generate an output voltage from an input voltage according to a pulsed control signal controlling switching of the switched power stage in dependence of a voltage error signal. The voltage error signal is a difference between a reference voltage and the output voltage. The method includes generating a cyclic ramp signal and generating the pulsed control signal by triggering a pulse of the pulsed control signal when a ramp of the cyclic ramp signal intersects the voltage error signal to control a pulse position. The control method provides a pulse translation technique to control charge and the inductor current in a cycle. In contrast to a modulation technique based on compensation that adjusts the duty cycle of the PWM control signal, a pulse of a nominally unaltered pulse width is just translated in time.
1 . A control method for a power converter comprising a switched power stage configured to generate an output voltage from an input voltage according to a pulsed control signal controlling a switching of the switched power stage in dependence of a voltage error signal, the voltage error signal being a difference between a reference voltage and the output voltage, the method comprising:
generating a cyclic ramp signal; and
generating the pulsed control signal by triggering a pulse of the pulsed control signal when a ramp of the cyclic ramp signal intersects the voltage error signal to control a pulse position.
2 . The control method according to claim 1 , wherein triggering a pulse of the pulsed control signal comprises discarding a ramp of the cyclic ramp signal when the ramp has formerly intersected the voltage error signal.
3 . The control method according to claim 1 further comprising:
determining a steady state pulse width of a pulse of the pulsed control signal by integrating a steady state voltage error signal.
4 . The control method according to claim 3 , wherein determining the steady pulse width comprises:
determining the steady state pulse width prior to generating the pulsed control signal and
setting a nominal pulse width of the pulsed control signal to the steady state pulse width.
5 . The control method according to claim 1 , wherein generating a cyclic ramp signal comprises generating a plurality of time-shifted voltage ramps having an identical slope, wherein time elapsed between two consecutive voltage ramps at the same level is identical.
6 . The control method according to claim 1 , wherein generating a cyclic ramp signal comprises:
generating the cyclic ramp signal such that a predefined number of ramps is present at any instance of time within a steady state cycle of the cyclic ramp signal, wherein the steady state cycle is defined as time elapsed between two consecutive pulses of the pulsed control signal at a same level generated for a steady state voltage error signal.
7 . The control method according 6 , wherein generating the cyclic ramp signal comprises:
adjusting a slope of all ramps of the cyclic ramp signal such that the predefined number of ramps is present at any instance of time within the steady state cycle of the cyclic ramp signal.
8 . The control method according to claim 1 comprising:
extending duration of a pulse of the pulsed control signal by a nominal pulse width instead of triggering a pulse of the pulsed control signal for each additional ramp of the cyclic ramp signal intersecting the voltage error signal at an instance of time when a pulse of the pulsed control signal is present.
9 . The control method according to claim 1 further comprising:
attempting to detect a steady state or a quasi-steady state shift in current; and
adjusting the nominal pulse width to offset a pulse translation resulting from a steady state or quasi-steady state shift when a steady state or quasi-steady state shift has been detected.
10 . The control method according to claim 1 further comprising:
varying a pulse width of the pulsed control signal so that a square of the pulse width yields a charge to be delivered in a cycle in dependence of a voltage error, wherein the charge to be delivered in a cycle depends on the voltage error and square of the pulse width.
11 . The control method according to claim 10 comprising:
varying the pulse width of the pulsed control signal such that a resulting charge Q of a cycle is given by
Q
=
V
in
-
V
out
2
L
(
V
in
V
out
)
t
p
2
,
wherein V in is input voltage, V out is output voltage, L is an inductance of the switchable power stage and t p is pulse width of the pulsed control signal.
12 . The control method according to claim 10 comprising:
varying the pulse width of the pulse control signal by augmenting a steady state pulse width t ss by an additional on-time t d such that an additional charge Q d of a cycle is given by
Q
=
V
in
-
V
out
2
L
(
V
in
V
out
)
t
d
t
ss
when the steady state pulse width t ss is determined otherwise.
13 . Power converter comprising
a switched power stage configured to generate an output voltage from an input voltage and
a controller configured to generate a pulsed control signal for switching the switched power stage in dependence of a voltage error signal, the voltage error signal being a difference between a reference voltage and the output voltage;
wherein the controller is configured to generate a cyclic ramp signal and wherein the controller is configured to generate the pulsed control signal by triggering a pulse of the pulsed control signal when a ramp of the cyclic ramp signal equals the voltage error signal to control a pulse position.
14 . The power converter according to claim 13 , wherein the controller comprises:
a filter configured to divide the voltage error signal into a steady state part and into a dynamic part;
an integrator configured to integrate the steady state part of the voltage error signal to determine a steady state pulse width;
a discontinuous conduction mode pulse (DCM) width control block configured to determine an additional on-time of the pulse by means of predictive charge mode control;
a pulse width control block connected to the integrator and the DCM pulse width control block configured to determine a pulse width based on the steady state pulse width and the additional on-time;
a ramp generator configured to generate the cyclic ramp signal;
a pulse position control block configured to determine a pulse position by triggering a pulse when a ramp of the cyclic ramp signal equals the voltage error signal; and
a pulse generator connected to the pulse width control block and the pulse position control block configured to generate the pulsed control signal based on the pulse width and the pulse position.
15 . The power converter according to claim 14 , wherein the controller further comprises:
a pulse position neutralizer connected between the pulse position control block and the pulse width control block and being configured to attempting to detect a steady state or a quasi-steady state shift in current; and to adjusting the nominal pulse width to offset a pulse translation resulting from a steady state or quasi-steady state shift when a steady state or quasi-steady state shift has been detected.