Quantum efficiency of multiple quantum wells
View Patent ↗Improved quantum efficiency of multiple quantum wells. In accordance with an embodiment of the present invention, an article of manufacture includes a p side for supplying holes and an n side for supplying electrons. The article of manufacture also includes a plurality of quantum well periods between the p side and the n side, each of the quantum well periods includes a quantum well layer and a barrier layer, with each of the barrier layers having a barrier height. The plurality of quantum well periods include different barrier heights.
1. A method comprising:
forming a stack of layers for a multiple quantum well semiconductor device on a substrate, said stack of layers comprising: a p type layer;
an electron blocking layer in contact with said p type layer;
a plurality of quantum well periods in contact with said electron blocking layer, each of said quantum well periods comprising a quantum well layer and a barrier layer that comprises a barrier layer p type doping concentration, and wherein said plurality of quantum well periods comprise barrier layers of varying p type doping concentration;
an n-type layer in contact with said plurality of quantum well periods; and
etching said stack of layers such that said plurality of quantum well periods comprise said quantum well layers of varying area.
2. The method of claim 1 wherein an area of each of said plurality of quantum well periods increases in a direction from said n type layer to said p type layer.
3. The method of claim 1 wherein an area of each of said plurality of barrier layers increases in a direction from said n type layer to said p type layer.
4. The method of claim 1 wherein an area of each of said plurality of quantum well layers increases in a direction from said n type layer to said p type layer.
5. The method of claim 1 wherein said barrier layer p type doping concentration decreases from said n type layer to said p type layer.
6. The method of claim 1 wherein each said quantum well layer has a quantum well layer thickness, and wherein said plurality of quantum well periods comprise quantum well layers of varying thickness.
7. The method of claim 6 wherein said quantum well layer thickness increases from said n type layer to said p type layer.
8. The method of claim 1 wherein each said barrier layer has a barrier layer thickness, and wherein said plurality of quantum well periods comprise barrier layers of varying thickness.
9. The method of claim 8 wherein said barrier layer thickness decreases from said n type layer to said p type layer.
10. The method of claim 1 wherein each said barrier layer has a barrier height, and wherein said plurality of quantum well periods comprise barrier layers of varying barrier height.
11. The method of claim 10 wherein said barrier height increases from said n type layer to said p type layer.
12. The method of claim 1 further comprising:
singulating said multiple quantum well semiconductor device to form a light emitting diode.
13. The method of claim 12 further comprising:
coupling said light emitting diode to electronics for converting alternating current to direct current suitable for use with said light emitting diode; and
coupling said electronics to a base configured for coupling to a source of said alternating current.
14. The method of claim 1 wherein said etching said stack of layers further comprises wet etching after nanoimprinting of said plurality of quantum well periods.