IP Library Granted Patent US 9,843,319
Granted Patent B2
US 9,843,319 · App. 14/629,907 · Granted Dec 12, 2017

System and method for a fault protection circuit

Inventors: Luca Petruzzi (Goedersdorf, AT); Bernhard Schaffer (Villach, AT); Florian Brugger (Villach, AT); Mario Tripolt (Ferndorf, AT)
Assignee: INFINEON TECHNOLOGIES AG
H03K17/082
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Quick Facts
Patent No.
US 9,843,319
App. No.
14/629,907
Granted
Dec 12, 2017
Kind
B2
Abstract

According to an embodiment, a fault protection system includes a first power supply terminal, a second power supply terminal, an error circuit configured to receive a power supply signal, and a power supply circuit coupled to the error circuit, the first power supply terminal, and the second power supply terminal. The power supply circuit is configured to provide the power supply signal from the first power supply terminal during a first operation mode and provide the power supply signal from the second power supply terminal during a second operation mode.

Claims (81)

1. A fault protection system comprising:

a first power supply terminal configured to be coupled to a regulated system supply signal generated from a first power source;

a second power supply terminal configured to be coupled to a mode control signal generated from the first power source;

an error circuit configured to receive a power supply signal; and

a power supply circuit coupled to the error circuit, the first power supply terminal, and the second power supply terminal, wherein the power supply circuit is configured to

provide the power supply signal from the first power supply terminal during a first operation mode, and

provide the power supply signal from the second power supply terminal during a second operation mode.

2. The fault protection system of claim 1 , wherein

the regulated system supply signal is generated at a first voltage regulator coupled to the first power source, and

the mode control signal is generated at a voltage limiter or a second voltage regulator coupled to the first power source.

3. The fault protection system of claim 2 , wherein the mode control signal is generated at a system monitor circuit configured to detect a fault in the regulated system supply signal.

4. The fault protection system of claim 3 , wherein the system monitor circuit is configured to detect a fault when a voltage level of the regulated system supply signal is below a first threshold.

5. The fault protection system of claim 3 , further comprising the system monitor circuit.

6. The fault protection system of claim 2 , wherein the first power source comprises a battery.

7. The fault protection system of claim 2 , wherein

the fault protection system operates in the first operation mode when the regulated system supply signal is above a first threshold, and

the fault protection system operates in the second operation mode when the regulated system supply signal is below the first threshold.

8. The fault protection system of claim 2 , wherein

the fault protection system operates in the first operation mode when the regulated system supply signal has no detected faults, and

the fault protection system operates in the second operation mode when the regulated system supply signal has a detected fault.

9. The fault protection system of claim 1 , further comprising a voltage limiter coupled between the first power source and the second power supply terminal.

10. The fault protection system of claim 1 , wherein the power supply circuit comprises

a first diode coupled from the first power supply terminal to the error circuit, and

a second diode coupled from the second power supply terminal to the error circuit.

11. The fault protection system of claim 1 , wherein the power supply circuit comprises an active rectifier circuit.

12. A fault protection system comprising:

a first power supply terminal;

a second power supply terminal;

an error circuit configured to receive a power supply signal, wherein the error circuit is configured to

receive an error signal from a power switch,

increment an error count based on the error signal, and

disable the power switch when the error count is above a first error threshold, wherein the error circuit maintains the power switch in a disabled state until the error count is below the first error threshold; and

a power supply circuit coupled to the error circuit, the first power supply terminal, and the second power supply terminal, wherein the power supply circuit is configured to

provide the power supply signal from the first power supply terminal during a first operation mode, and

provide the power supply signal from the second power supply terminal during a second operation mode.

13. The fault protection system of claim 12 , wherein the error circuit further comprises a reset circuit configured to reset the error count.

14. The fault protection system of claim 12 , further comprising the power switch.

15. The fault protection system of claim 12 , further comprising a plurality of power switches and a plurality of error circuits, each error circuit configured to receive the power supply signal.

16. The fault protection system of claim 12 , wherein

the first power supply terminal is configured to be coupled to a regulated system supply signal generated from a first power source; and

the second power supply terminal is configured to be coupled to a mode control signal generated from the first power source.

17. A method of operating a fault protection system, the method comprising:

receiving a main power supply from a system supply circuit during a first mode, wherein operation in the first mode occurs when the main power supply has no detected faults;

receiving a secondary power supply from a fault mode control circuit during a second mode, wherein operation in the second mode occurs when the main power supply has a detected fault;

receiving an error signal from a power switch;

incrementing an error count based on the error signal;

disabling the power switch when the error count is above a first error threshold; and

maintaining the power switch in a disabled state until the error count is below the first error threshold.

18. The method of claim 17 , further comprising detecting a fault in the main power supply at the fault mode control circuit, wherein detecting a fault comprises determining whether a voltage level of the main power supply is below a first threshold.

19. The method of claim 17 , further comprising generating the main power supply in the system supply circuit using a voltage regulator coupled to a battery.

20. The method of claim 19 , further comprising generating the secondary power supply in the fault mode control circuit using a voltage limiter.

21. A power supply system comprising:

a plurality of power switches configured to be coupled to a power supply and to supply a plurality of loads;

a plurality of switch drivers configured to supply drive signals to the plurality of power switches and receive a fault mode control signal;

a plurality of fault protection circuits configured to supply disable signals to the plurality of switch drivers, wherein the plurality of fault protection circuits are configured to be coupled to a supply voltage and to receive a plurality of error signals from the plurality of power switches; and

a supply circuit coupled to the plurality of fault protection circuits, wherein the supply circuit is configured to provide the supply voltage to the plurality of fault protection circuits from a first system supply source during a first mode and to provide the supply voltage to the plurality of fault protection circuits from the fault mode control signal during a second mode.

22. The power supply system of claim 21 , wherein the first system supply source is generated by a voltage regulator coupled to the power supply.

23. The power supply system of claim 22 , wherein the power supply comprises a battery.

24. The power supply system of claim 23 , wherein

the power supply system is an automotive system,

the plurality of loads comprises a plurality of automotive loads, and

the second mode comprises a limp home mode of operation for the automotive system.

25. The power supply system of claim 21 , wherein

the first mode comprises operation when a voltage level of the first system supply source is above an operation threshold, and

the second mode comprises operation when the voltage level of the first system supply source is below the operation threshold.

26. The power supply system of claim 21 , wherein

the first mode comprises operation when the first system supply source has no detected faults, and

the second mode comprises operation when the first system supply source has a detected fault.

27. The power supply system of claim 26 , further comprising a system monitor circuit configured to detect faults and supply the fault mode control signal.

28. The power supply system of claim 21 , wherein the plurality of fault protection circuits comprises a plurality of error counters, wherein each error counter is configured to

receive an error signal from a corresponding power switch of the plurality of power switches,

increment an error count for the corresponding power switch based on the error signal, and

disable the corresponding power switch when the error count for the corresponding power switch is above a first error threshold, wherein each error counter maintains the corresponding power switch in a disabled state until the error count for the corresponding power switch is below the first error threshold.

29. A fault protection system comprising:

a first power supply terminal;

a second power supply terminal;

an error circuit configured to receive a power supply signal;

a power supply circuit coupled to the error circuit, the first power supply terminal, and the second power supply terminal, wherein the power supply circuit is configured to

provide the power supply signal from the first power supply terminal during a first operation mode, and

provide the power supply signal from the second power supply terminal during a second operation mode; and

a voltage limiter coupled between a first power source and the second power supply terminal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: PETRUZZI, LUCA; SCHAFFER, BERNHARD; BRUGGER, FLORIAN; TRIPOLT, MARIO
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035090/0162 →
Continuity (1)
Related Publication 20160248242A1 · Aug 25, 2016