Transistor, resistance variable memory device including the same, and manufacturing method thereof
A resistance variable memory device including a vertical transistor includes an active pillar including a channel region, a source formed in one end of the channel region, and a lightly doped drain (LDD) region and a drain formed in the other end of the channel region, a first gate electrode formed to surround a periphery of the LDD region and having a first work function, and a second gate electrode formed to be connected to the first gate electrode and to surround the channel region and having a second work function that is higher than the first work function.
1. A method of manufacturing a semiconductor device, comprising:
forming a source region in a semiconductor substrate;
forming a semiconductor layer on the source region;
patterning the semiconductor layer to form an active pillar;
forming a first gate electrode to surround the active pillar;
surrounding an upper region of the first gate electrode with an insulating layer while exposing a lower region of the first gate electrode; and
forming a second gate electrode by increasing a work function of the exposed lower region of the first gate electrode.
2. The method of claim 1 , wherein the forming of the second gate electrode includes implanting nitrogen ions into the exposed lower region of the first gate electrode.
3. The method of claim 1 , wherein the forming of the second gate electrode includes:
forming a silicon layer on the exposed lower region of the first gate electrode; and
forming a silicide layer by reacting the first gate electrode and the silicon layer.
4. The method of claim 1 , further comprising:
forming a lower electrode on the active pillar; and
forming a resistive memory layer on the lower electrode.
5. The method of claim 1 , wherein the first gate electrode includes a transition metal layer including one selected from the group comprising titanium (Ti), tantalum (Ta), cobalt (Co), and platinum (Pt).