IP Library Granted Patent US 9,761,676
Granted Patent B2
US 9,761,676 · App. 14/634,614 · Granted Sep 12, 2017

Power semiconductor device with embedded field electrodes

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Quick Facts
Patent No.
US 9,761,676
App. No.
14/634,614
Granted
Sep 12, 2017
Kind
B2
Abstract

A power semiconductor device is disclosed. The power semiconductor device includes an upper drift region situated over a lower drift region, a field electrode embedded in the lower drift region, the field electrode not being directly aligned with a gate trench in a body region of the power semiconductor device, where respective top surfaces of the field electrode and the lower drift region are substantially co-planar. A conductive filler in the field electrode can be substantially uniformly doped, and the field electrode is in direct electrical contact with the upper drift region.

Claims (29)

1. A power semiconductor device comprising:

an upper drift region situated over a lower drift region;

a field electrode embedded in said lower drift region;

said field electrode not being directly aligned with a gate trench in a body region of said power semiconductor device;

wherein respective top surfaces of said field electrode and said lower drift region are substantially co-planar;

wherein said gate trench runs lengthwise in a direction parallel to said top surface of said lower drift region;

wherein said field electrode is situated in a trench in said lower drift region that runs lengthwise along the same direction as said gate trench.

2. The power semiconductor device of claim 1 , wherein said field electrode comprises a conductive filler and an insulation material in said trench in said lower drift region.

3. The power semiconductor device of claim 1 , wherein said field electrode comprises polysilicon.

4. The power semiconductor device of claim 1 , wherein said field electrode comprises amorphous silicon.

5. The power semiconductor device of claim 1 , wherein said field electrode is held at approximately an intermediate potential between a source and a drain of said power semiconductor device under reverse bias.

6. The power semiconductor device of claim 1 , further comprising another field electrode in said lower drift region, wherein said top surface of said field electrode is substantially co-planar with a top surface of said another field electrode.

7. The power semiconductor device of claim 1 , wherein said field electrode is situated below a source of said power semiconductor device.

8. The power semiconductor device of claim 1 , wherein said field electrode is in direct electrical contact with said upper drift region.

9. A power semiconductor device comprising:

an upper drift region situated over a lower drift region;

a field electrode embedded in said lower drift region;

said field electrode not being directly aligned with a gate trench in a body region of said power semiconductor device;

wherein respective top surfaces of said field electrode and said lower drift region are substantially co-planar;

wherein said gate trench runs lengthwise in a direction parallel to said top surface of said lower drift region;

wherein a conductive filler in said field electrode is substantially uniformly doped;

wherein said field electrode is situated in a trench in said lower drift region that runs lengthwise along the same direction as said gate trench.

10. The power semiconductor device of claim 9 , wherein said field electrode comprises a conductive filler and an insulation material in said trench in said lower drift region.

11. The power semiconductor device of claim 9 , wherein said field electrode comprises polysilicon.

12. The power semiconductor device of claim 9 , wherein said field electrode comprises amorphous silicon.

13. The power semiconductor device of claim 9 , wherein said field electrode is held at approximately an intermediate potential between a source and a drain of said power semiconductor device under reverse bias.

14. The power semiconductor device of claim 9 , further comprising another field electrode in said lower drift region, wherein said top surface of said field electrode is substantially co-planar with a top surface of said another field electrode.

15. The power semiconductor device of claim 9 , wherein said field electrode is situated below a source of said power semiconductor device.

16. The power semiconductor device of claim 9 , wherein said field electrode is in direct electrical contact with said upper drift region.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Apr 13, 2016
From: INFINEON TECHNOLOGIES NORTH AMERICA CORP.; INTERNATIONAL RECTIFIER CORPORATION; INTERNATIONAL RECTIFIER CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 038463/0859 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2015
From: HENSON, TIMOTHY D.
To: INTERNATIONAL RECTIFIER CORPORATION
Reel/Frame 035057/0979 →