IP Library Granted Patent US 10,048,306
Granted Patent B1
US 10,048,306 · App. 14/635,570 · Granted Aug 14, 2018

Methods and apparatus for automated integrated circuit package testing

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Quick Facts
Patent No.
US 10,048,306
App. No.
14/635,570
Granted
Aug 14, 2018
Kind
B1
Abstract

A test system for testing an integrated circuit package is provided. The test system may include a test board on which a package under test can be mounted, a test box for gathering desired measurements on the package under test, and a test host for automatically controlling the test box during testing. The test box may be coupled to row multiplexing circuitry and column multiplexing circuitry for selectively addressing one or more daisy-chained nets in the package under test. The test box may also be coupled to a source measurement unit (SMU) component that provides current source signals to the package under test and to a digital multimeter (DMM) component that provides voltage sense signals to the package under test. Arranged in this way, the test system can be configured to perform automated I-V curve tracing, resistance measurements, open/short circuit detection, and monitoring of other package-level manufacturing defects.

Claims (18)

1. A test system for testing an integrated circuit package, comprising:

a test board;

a socket on the test board that includes an array of test contacts configured to mate with the integrated circuit package;

row multiplexing circuitry coupled to respective rows in the array of test contacts; and

column multiplexing circuitry coupled to respective columns in the array of test contacts, wherein the row and column multiplexing circuitries are configured to select first and second test contacts in the array for testing, wherein a daisy chain on the integrated circuit package is coupled between the first and second test contacts, wherein the row multiplexing circuitry is coupled to the first test contact, and wherein the column multiplexing circuitry is coupled to the second test contact.

2. The test system defined in claim 1 , further comprising:

a source measurement unit that supplies test current source signals to the first and second test contacts during testing.

3. The test system defined in claim 1 , further comprising:

a digital multimeter unit that supplies test voltage sense signals to the first and second test contacts during testing.

4. The test system defined in claim 1 , wherein the column multiplexing circuitry is coupled to only a subset of columns in the array.

5. The test system defined in claim 4 , wherein the column multiplexing circuitry is coupled to every other column of test contacts in the array.

6. The test system defined in claim 1 , wherein the row multiplexing circuitry is coupled to only a subset of test contacts in each row of the array.

7. The test system defined in claim 6 , wherein the row multiplexing circuitry is coupled to test contacts in every other column of the array.

8. The test system defined in claim 1 , further comprising:

a test host that runs an automated test platform for controlling the row and column multiplexing circuitries during testing.

9. The test system defined in claim 1 , wherein the row multiplexing circuitry is part of a row multiplexing card that is mounted on a data acquisition system, wherein the column multiplexing circuitry is part of a column multiplexing card that is mounted on the data acquisition system, and wherein the data acquisition system further comprises:

a source measurement unit (SMU) card configured to supply test current signals to the integrated circuit package; and

a digital multimeter (DMM) card configured to supply test voltage signals to the integrated circuit package, wherein the data acquisition system is coupled to and separate from the test board.

Assignments (2)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2015
From: DARBHA, SRIKANTH; BEACH, RONALD M.; MAHADEV, VADALI; SURE, GANESH; CHANDA, KAUSHIK
To: ALTERA CORPORATION
Reel/Frame 035068/0190 →