IP Library Granted Patent US 9,449,936
Granted Patent B2
US 9,449,936 · App. 14/641,056 · Granted Sep 20, 2016

Grid array connection device and method

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,449,936
App. No.
14/641,056
Granted
Sep 20, 2016
Kind
B2
Abstract

A method and device for input/output connections is provided. Devices and methods for connection structure are shown with improved mechanical properties such as hardness and abrasion resistance. Land grid array structures are provided that are less expensive to manufacture due to reductions in material cost such as gold. Ball grid array structures are provided with improved resistance to corrosion during fabrication. Ball grid array structures are also provided with improved mechanical properties resulting in improved shock testing results.

Claims (15)

1. A semiconductor chip connection structure comprising:

a metallic connection structure;

a first layer including nickel (Ni) on the metallic connection structure;

a solder structure;

an intermetallic layer including copper (Cu), nickel (Ni) and tin (Sn) between the first layer including nickel (Ni) and the solder structure; and

a second layer including tin (Sn), nickel (Ni), copper (Cu) and phosphorous (P) between the intermetallic layer and the first layer.

2. The semiconductor chip connection structure of claim 1 , wherein the intermetallic layer includes crystalline grains.

3. The semiconductor chip connection structure of claim 2 , wherein the crystalline grains are elongated.

4. The semiconductor chip connection structure of claim 1 , wherein the intermetallic layer includes (CuNi) 6 Sn 5 .

5. The semiconductor chip connection structure of claim 1 , wherein the first layer including (Ni) further includes phosphorous (P).

6. The semiconductor chip connection structure of claim 1 , wherein the solder structure includes tin (Sn), silver (Ag) and copper (Cu).

7. The semiconductor chip connection structure of claim 1 , wherein the metallic connection structure comprises copper (Cu).

8. The semiconductor chip connection structure of claim 1 , wherein the solder structure includes a ball grid array solder ball.

9. The semiconductor chip connection structure of claim 1 , wherein the chip connection structure provides an input/output connection between a chip package and a circuit board.

10. The semiconductor chip connection structure of claim 1 , wherein the solder structure includes palladium (Pd).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →