IP Library Granted Patent US 9,436,194
Granted Patent B1
US 9,436,194 · App. 14/641,235 · Granted Sep 6, 2016

Power sensing

Inventors: Tom Truong (San Francisco, CA); Albert Chen (Saratoga, CA)
Assignee: Silego Technology, Inc.
G05F1/462G01R21/133H02J7/0029
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Quick Facts
Patent No.
US 9,436,194
App. No.
14/641,235
Granted
Sep 6, 2016
Kind
B1
Abstract

Improved techniques for sensing and reporting consumed power are disclosed. The disclosed techniques comprise an integrated circuit solution for sensing power. In some embodiments, such an integrated circuit comprises a resistor on which a sense voltage sensed across an external resistor in response to a load current is mirrored and an analog-to-digital converter configured to regulate the voltage across the resistor and output a binary value representing power. The binary value representing power may integrate one or more electrical or environmental parameters such as current, voltage, temperature, battery voltage, etc.

Claims (30)

1. An integrated circuit, comprising:

an internal resistor on which a sense voltage sensed across an external resistor in response to a load current is mirrored; and

an analog-to-digital converter whose output sets a resistor ladder that regulates the voltage across the internal resistor to mirror the sense voltage and comprises a digital value representing power.

2. The integrated circuit of claim 1 , further comprising circuitry to integrate one or more electrical or environmental parameters in the digital value representing power.

3. The integrated circuit of claim 1 , further comprising circuitry to integrate a system temperature value in the digital value representing power.

4. The integrated circuit of claim 1 , further comprising circuitry to integrate a battery voltage value in the digital value representing power.

5. The integrated circuit of claim 1 , further comprising circuitry to generate a warning in the event that a safe operating region is violated.

6. The integrated circuit of claim 5 , wherein the safe operating region is associated with power and temperature.

7. The integrated circuit of claim 5 , wherein the safe operating region is associated with power and remaining battery charge.

8. The integrated circuit of claim 1 , wherein the digital value representing power represents power consumed by a load of an associated system.

9. The integrated circuit of claim 1 , wherein the digital value representing power represents a total power margin for an associated system.

10. The integrated circuit of claim 1 , wherein the digital value representing power represents a current.

11. The integrated circuit of claim 1 , wherein the digital value representing power is a function of one or more ratios of resistance values.

12. A computer program product embodied in a non-transitory computer readable storage medium and comprising computer instructions for:

mirroring a sense voltage sensed across an external resistor in response to a load current on an internal resistor of an integrated circuit; and

regulating voltage across the internal resistor to mirror the sense voltage using a resistor ladder set by an output of an analog-to-digital converter comprising the integrated circuit,

wherein the output of the analog-to-digital converter comprises a digital value representing power.

13. A method, comprising:

mirroring a sense voltage sensed across an external resistor in response to a load current on an internal resistor of an integrated circuit; and

regulating voltage across the internal resistor to mirror the sense voltage using a resistor ladder set by an output of an analog-to-digital converter comprising the integrated circuit, wherein the output of the analog-to-digital converter comprises a digital value representing power.

14. The method of claim 13 , further comprising integrating one or more electrical or environmental parameters in the digital value representing power.

15. The method of claim 13 , further comprising integrating a system temperature value in the digital value representing power.

16. The method of claim 13 , further comprising integrating a battery voltage value in the digital value representing power.

17. The method of claim 13 , further comprising generating a warning in the event that a safe operating region is violated.

18. The method of claim 17 , wherein the safe operating region is associated with power and temperature.

19. The method of claim 17 , wherein the safe operating region is associated with power and remaining battery charge.

20. The method of claim 13 , wherein the digital value representing power represents power consumed by a load of an associated system.

21. The method of claim 13 , wherein the digital value representing power represents a total power margin for an associated system.

22. The method of claim 13 , wherein the digital value representing power represents a current.

23. The method of claim 13 , wherein the digital value representing power is a function of one or more ratios of resistance values.

Assignments (2)
CHANGE OF NAME Recorded Nov 22, 2022
From: SILEGO TECHNOLOGY, INC.
To: RENESAS DESIGN TECHNOLOGY INC.
Reel/Frame 061987/0827 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2015
From: TRUONG, TOM; CHEN, ALBERT
To: SILEGO TECHNOLOGY, INC.
Reel/Frame 035878/0799 →
Continuity (1)
Provisional Application 61949156 · Mar 6, 2014