Isometric test compression with low toggling activity

1. A method comprising:

for each of a plurality of faults, determining, by one or more computing devices, a plurality of probability values associated with observing a fault along a plurality of propagation paths of a circuit design;

generating, by the one or more computing devices, a plurality of residual test cubes by at least, for each of the plurality of faults, generating a corresponding residual test cube for the fault based on determining that one or more from the plurality of probability values are above a predefined threshold; and

generating, by the one or more computing devices, test templates based on merging the plurality of residual test cubes.

2. The method recited in claim 1 , further comprising:

generating a plurality of test patterns based on one of the test templates.

3. The method recited in claim 1 , further comprising:

generating a plurality of compressed test patterns based on one of the test templates.

4. The method recited in claim 1 , further comprising:

injecting, for each of the plurality of faults, the fault into the circuit design; and

determining, for each of the plurality of faults, a probabilistic test cube profile based on the plurality of probability values.

5. The method recited in claim 4 , wherein the generating the corresponding residual test cube for the fault is performed by keeping specified bits that have probability values above the predefined threshold.

6. The method recited in claim 1 , further comprising:

continuing the merging until a number of toggling points reaches a predetermined threshold.

7. The method recited in claim 1 , wherein the generating the test templates comprises:

determining a fewest number of toggling points for a merged residual test cube.

8. The method recited in claim 1 , wherein the generating the test templates is based at least in part on spacing between neighboring toggling points.

9. One or more non-transitory computer-readable media storing executable instructions that, when executed, cause one or more processors to:

for each of a plurality of faults, determine a plurality of probability values associated with observing a fault along a plurality of propagation paths of a circuit design;

generate a plurality of residual test cubes by at least, for each the plurality of faults, generating a corresponding residual test cube for the fault based on determining that one or more from the plurality of probability values are above a predefined threshold; and

generate test templates based on merging the plurality of residual test cubes.

10. The one or more non-transitory computer-readable media recited in claim 9 , wherein the executable instructions, when executed, cause the one or more processors to:

generate a plurality of test patterns based on one of the test templates.

11. The one or more non-transitory computer-readable media recited in claim 9 , wherein the executable instructions, when executed, cause the one or more processors to:

generate a plurality of compressed test patterns based on one of the test templates.

12. The one or more non-transitory computer-readable media recited in claim 9 , wherein the executable instructions, when executed, cause the one or more processors to:

inject, for each of the plurality of faults, the fault into the circuit design; and

determine, for each of the plurality of faults, a probabilistic test cube profile based on the plurality of probability values.

13. The one or more non-transitory computer-readable media recited in claim 12 , wherein generating the corresponding residual test cube for the fault is performed by keeping specified bits that have probability values above the predefined threshold.

14. The one or more non-transitory computer-readable media recited in claim 9 , wherein the executable instructions, when executed, cause the one or more processors to continue the merging until a number of toggling points reaches a predetermined threshold.

15. The one or more non-transitory computer-readable media recited in claim 9 , wherein causing the one or more processors to generate the test templates comprises causing the one or more processors to:

determine a fewest number of toggling points for a merged residual test cube.

16. The one or more non-transitory computer-readable media recited in claim 9 , wherein causing the one or more processors to generate the test templates comprises causing the one or more processors to generate the test templates based at least in part on spacing between neighboring toggling points.

17. The method of claim 1 , wherein the plurality of probability values indicates whether there is a unique propagation path for observing the fault.

18. A method comprising:

determining, by one or more computing devices, a first probability associated with observing a first fault along at least one propagation path of a circuit design;

determining, by one or more computing devices, a second probability associated with observing a second fault along at least one propagation path of the circuit design;

based on the first probability or the second probability being above a threshold, generating, by the one or more computing devices, a residual test cube that includes the first probability or the second probability; and

generating, by the one or more computing devices, test templates based on the residual test cube.

19. The method recited in claim 18 , wherein the first probability indicates that there is a unique propagation path for observing the first fault.

20. The method recited in claim 18 , wherein the second probability indicates that there are two or more propagation paths for observing the first fault.