IP Library Granted Patent US 9,953,895
Granted Patent B2
US 9,953,895 · App. 14/643,837 · Granted Apr 24, 2018

Heat pipe and method of manufacturing the same

Inventors: Pascal Ancey (Revel, FR); Simon Gousseau (Grenoble, FR); Olga Kokshagina (Paris, FR)
Assignees: STMICROELECTRONICS SA; STMICROELECTRONICS (CROLLES 2) SAS
H01L23/427F28D15/04F28D15/046H01L21/02164H01L21/30655H01L21/32051H01L21/32056H01L21/4803H01L23/367H01L23/473F28D2015/0225H01L2924/0002
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,953,895
App. No.
14/643,837
Granted
Apr 24, 2018
Kind
B2
Abstract

A method of manufacturing a heat pipe, including the steps of: forming in a substrate a cylindrical opening provided with a plurality of ring-shaped recessed radially extending around a central axis of the opening; arranging in the recesses separate ring-shaped strips made of a material catalyzing the growth of carbon nanotubes; and growing carbon nanotubes in the opening from said ring-shaped strips.

Claims (38)

1. A method of manufacturing an integrated circuit chip, the method comprising:

in a substrate of semiconductor material, forming an active area and at least one heat pipe, the heat pipe being configured to remove heat from the active area, the heat pipe including an opening with a plurality of ring-shaped recesses radially extending around a central axis of the opening, each of the ring-shaped recesses being vertically stacked along the central axis;

in the recesses, arranging a plurality of ring-shaped strips made of a material configured to catalyze growth of carbon nanotubes; and

forming carbon nanotubes in the opening, the carbon nanotubes extending from the plurality of ring-shaped strips and having ends extending towards the central axis of the opening.

2. The method of claim 1 , wherein forming the opening with the plurality of ring-shaped recesses comprises alternating between anisotropic etch steps and passivation deposition steps.

3. The method of claim 2 , wherein the anisotropic etch steps are carried out by an SF6 plasma etch, and the passivation steps are carried out by a C4F8 plasma deposition.

4. The method of claim 1 , wherein the opening includes walls and a bottom surface, wherein arranging the plurality of ring-shaped strips comprises depositing, on the walls of the opening, a continuous layer of a material configured to catalyze growth of carbon nanotubes, the method further comprising focused isotropic etching of a portion of the continuous layer located outside of the recesses.

5. The method of claim 4 , wherein said continuous layer includes iron or aluminum.

6. The method of claim 1 , further comprising, prior to arranging the plurality of ring-shaped strips, depositing, on walls of the opening, an intermediate layer made of a bonding material for said catalyst material.

7. The method of claim 6 , wherein the bonding material of the intermediate layer is a fluid tight material.

8. The method of claim 6 , wherein the intermediate layer is made of silicon oxide.

9. The method of claim 1 , further comprising, after forming the carbon nanotubes, densifying the carbon nanotubes.

10. The method of claim 9 , wherein densifying the carbon nanotubes comprises soaking the carbon nanotubes in a solution containing a solvent and evaporating the solvent.

11. The method of claim 1 , further comprising, after forming the carbon nanotubes, partially filling the opening with a heat-transfer liquid and closing the opening.

12. The method of claim 1 wherein forming the carbon nanotubes comprises growing the carbon nanotubes in the opening from said ring-shaped strips.

13. A semiconductor chip, comprising:

a substrate of semiconductor material;

an active area at a first surface of the substrate; and

a heat pipe in the substrate and configured to remove heat from the active area, the heat pipe including:

an opening arranged in the substrate, said opening having a plurality of ring-shaped recesses radially extending around a central axis of the opening, each of the ring-shaped recesses being vertically stacked relative to the central axis;

ring-shaped strips made of a material configured to catalyze growth of carbon nanotubes and arranged in the recesses; and

carbon nanotubes extending in the opening from said ring-shaped strips and having ends facing the central axis.

14. The semiconductor chip of claim 13 , further comprising a heat-transfer liquid partially filling the opening.

15. The semiconductor chip of claim 13 , comprising at least one cap closing the opening in a fluid tight manner.

16. The semiconductor chip of claim 13 , wherein the opening has a cylindrical shape.

17. An integrated circuit chip comprising:

a substrate;

an active area formed in the substrate; and

at least one heat pipe located in the substrate near the active area and configured to remove heat from the active area, the at least one heat pipe including:

an opening having sidewalls and a bottom surface in the substrate, the sidewalls having a plurality of ring-shaped recesses, each of the ring-shaped recesses extending radially around a central axis of the opening, each of the ring-shaped recesses being vertically stacked along the central axis;

a catalyzing material located in each of the ring-shaped recesses and forming ring-shaped strips; and

carbon nanotubes extending from the ring-shaped strips.

18. The integrated circuit chip of claim 17 , further comprising a heat-transfer liquid partially filling the opening.

19. The integrated circuit chip of claim 17 , further comprising at least one cap closing the opening in a fluid tight manner.

20. The integrated circuit chip of claim 17 , comprising a plurality of heat pipes located in the substrate near the active area and configured to remove heat from the active area.

21. The integrated circuit chip of claim 17 , further comprising an intermediate layer in the ring-shaped recesses located between the substrate and the catalyzing material.

22. The integrated circuit chip of claim 21 , wherein the catalyzing material located in each of the ring-shaped recesses is separated from each other by the intermediate layer.

23. The integrated circuit chip of claim 21 , wherein the intermediate layer is silicon oxide.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2022
From: STMICROELECTRONICS (CROLLES 2) SAS
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 060784/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2022
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 060620/0769 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2016
From: KOKSHAGINA, OLGA
To: STMICROELECTRONICS SA; STMICROELECTRONICS (CROLLES 2) SAS
Reel/Frame 037756/0386 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2016
From: ANCEY, PASCAL
To: STMICROELECTRONICS SA
Reel/Frame 037625/0336 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2016
From: GOUSSEAU, SIMON
To: STMICROELECTRONICS SA; STMICROELECTRONICS (CROLLES 2) SAS
Reel/Frame 037625/0339 →
Priority Claims (1)
FR 14 52010 · Mar 11, 2014 · national
Continuity (1)
Related Publication 20150262908A1 · Sep 17, 2015