IP Library Granted Patent US 9,835,715
Granted Patent B2
US 9,835,715 · App. 14/660,471 · Granted Dec 5, 2017

Integrated circuit, radar device and method of calibrating a receiver

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Quick Facts
Patent No.
US 9,835,715
App. No.
14/660,471
Granted
Dec 5, 2017
Kind
B2
Abstract

An integrated circuit for a radar device comprises at least one transmitter and at least one receiver. The integrated circuit comprises: a direct digital synthesizer, DDS, configured to output a control signal; and a multiplier configured to receive a local oscillator input signal and a further input signal from the DDS. In a first mode of operation, the DDS and multiplier cooperate to generate at least one transmitter signal to be transmitted from the radar device; and in a second mode of operation the DDS and multiplier cooperate to generate at least one low frequency modulated transmitter signal to be internally routed to the at least one receiver for calibrating the at least one receiver.

Claims (36)

1. An integrated circuit for a radar device comprising at least one transmitter and at least one receiver, the integrated circuit comprising:

a direct digital synthesiser, DDS, configured to output at least one control signal; and

a multiplier configured to receive a local oscillator input signal and a further input signal from the DDS;

wherein:

in a first mode of operation the DDS and multiplier cooperate to generate at least one transmitter signal to be transmitted from the radar device; and

in a second mode of operation the DDS and multiplier cooperate to generate at least one low frequency modulated transmitter signal to be internally routed to the at least one receiver for calibrating the at least one receiver.

2. The integrated circuit of claim 1 wherein the DDS is configured to output a DC control signal in the first mode of operation and re-configured to output a low frequency control signal in the second mode of operation.

3. The integrated circuit of claim 2 wherein in the second mode of operation the at least one DDS control signal comprises two low frequency signals separated by 90 degrees.

4. The integrated circuit of claim 1 wherein the multiplier is at least one from a group of: a phase shifter, a radio frequency, RF, mixer, a RF quadrature mixer.

5. The integrated circuit of claim 1 wherein the multiplier is configured to realize vector modulation in the second mode of operation.

6. The integrated circuit of claim 1 wherein the multiplier cooperating with the DDS is configured to realize phase generation and low frequency generation in at least two modulated transmitter signals.

7. The integrated circuit of claim 1 wherein the local oscillator input signal comprises two radio frequency signals separated by 90 degrees.

8. A radar device comprising:

at least one receiver to be calibrated; and

at least one transmitter comprising:

a direct digital synthesiser, DDS, configured to output at least one control signal; and

a multiplier configured to receive a local oscillator input signal and a further input signal from the DDS;

wherein:

in a first mode of operation the DDS and multiplier cooperate to generate at least one transmitter signal to be transmitted from the radar device; and

in a second mode of operation the DDS and multiplier cooperate to generate at least one low frequency modulated transmitter signal to be internally routed to the at least one receiver for calibrating the at least one receiver.

9. The radar device of claim 8 wherein the DDS is configured to output a DC control signal in the first mode of operation and re-configured to output a low frequency control signal in the second mode of operation.

10. The radar device of claim 9 further comprising a signal processor configured to process the received at least two modulated transmitter signals; and calibrate the at least one receiver of the radar device using the processed at least at least one low frequency modulated transmitter signal.

11. The radar device of claim 10 further comprising a memory operably coupled to the signal processor and configured to store calibration information related to the at least one receiver of the radar.

12. The radar device of claim 8 further comprising a controller operably coupled to the DDS and adapted to re-configure the DDS to output at least one low frequency control signal in the second mode of operation.

13. The radar device of claim 8 wherein the radar device is from a group of: a long range radar device, short range radar device, operating at millimeter waveform frequencies.

14. A method of calibrating at least one receiver of a radar device, the method comprising:

switching the radar device to a receiver calibration mode of operation;

re-configuring a transmitter circuit of the radar device to generate at least one low frequency modulated transmitter signal;

routing the generated at least one low frequency modulated transmitter signal to the at least one receiver internally within the radar device;

processing the received at least one low frequency modulated transmitter signal; and

calibrating the at least one receiver of the radar device using the processed at least one low frequency modulated transmitter signal.

15. The method of claim 14 wherein re-configuring a transmitter circuit of the radar device to generate at least one low frequency modulated transmitter signal comprises re-configuring a direct digital synthesiser to generate at least one digital intermediate frequency modulation signal.

16. The method of claim 15 wherein re-configuring the direct digital synthesiser to generate at least one digital intermediate frequency modulation signal comprises generating two digital intermediate frequency signals separated by 90 degrees.

17. The method of claim 14 wherein calibrating the at least one receiver comprises determining a phase difference between the at least two modulated transmitter signals routed through the at least one receiver path(s).

18. The method of claim 14 wherein the at least one low frequency modulated transmitter signal comprises at least two independently low frequency modulated signals.

19. The method of claim 14 wherein re-configuring a transmitter circuit of the radar device to generate at least one low frequency modulated transmitter signal comprises applying independent low frequency modulated control signals to two input local oscillator signals separated by 90 degrees.

Assignments (15)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0341 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0359 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0974 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0112 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0095 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0080 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2015
From: DELBECQ, DOMINIQUE; DOARE, OLIVIER; MONTORIOL, GILLES
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 035184/0376 →