Systems and method for bit-flipping decoders with partial-column processing, ordering and scheduling

1. A method for performing a parity check on encoded data, the method comprising:

receiving the encoded data, the encoded data including a plurality of data symbols and a plurality of parity check symbols;

retrieving, from memory, a parity check matrix associated with the plurality of parity check symbols;

determining, using control circuitry, a first portion of an array of the received encoded data, the first portion having a dimension of the parity check matrix, on which to perform a parity check;

performing, based on the parity check matrix associated with the plurality of parity check symbols, a first parity check on the first portion;

in response to determining the first parity check is successful, adjusting a parity check number that is associated with the array;

selectively performing, using control circuitry, additional parity checks on subsequent portions of the array based on comparing the adjusted parity check number to a threshold;

in response to comparing the adjusted parity check number to the threshold, determining to perform the additional parity checks on subsequent portions of the array;

based on the additional parity checks, determining to change a value of a data symbol of the plurality of data symbols, the data symbol being associated with the array, wherein an indication that the value of the data symbol of the plurality of data symbols changed is stored in the memory; and

in response to determining to change the value of the data symbol, storing an index corresponding to the array in a buffer.

2. The method of claim 1 , wherein the array is a first array; and further comprising performing, during a same clock cycle as the first parity check, a second parity check on a second portion of a second array of the received encoded data, the second portion of the second array having the dimension of the parity check matrix, wherein the second array is different from the first array.

3. The method of claim 2 , further comprising selecting the second portion of the second array such that a first check node associated with the first portion is different from a second check node associated with the second portion.

4. The method of claim 3 , further comprising:

storing the adjusted parity check number in a first buffer;

performing a third parity check on a third portion of the first array;

in response to determining the third parity check is successful, incrementing the parity check number; and

storing the incremented parity check number in the first buffer.

5. The method of claim 4 , further comprising:

storing, in a second buffer, indices corresponding to the first and second arrays;

storing, in a third buffer, first and second processed portion numbers;

incrementing the first processed portion number in response to performing the first parity check;

storing the incremented first processed portion number in the third buffer;

further incrementing the first processed portion number in response to performing the third parity check;

storing the further incremented first processed portion number in the third buffer;

incrementing the second processed portion number in response to performing the second parity check;

storing the incremented second processed portion number in the third buffer;

selecting, based on the stored indices and processed portion numbers, a fourth portion of a third array of the received encoded data, the fourth portion of the third array having the dimension of the parity check matrix; and

performing a fourth parity check on the selected fourth portion.

6. The method of claim 1 , wherein the first portion is associated with a plurality of check nodes.

7. The method of claim 1 , wherein the array is a first array and selectively performing additional parity checks comprises:

in response to comparing the adjusted parity check number to the threshold, determining not to perform the additional parity checks on subsequent portions of the first array; and

in response to comparing the adjusted parity check number to the threshold, determining not to change a value of another data symbol of the plurality of data symbols, the data symbol being associated with the first array.

8. The method of claim 7 , wherein the threshold is a first threshold and further comprising performing a decoding iteration comprising:

storing, in a first buffer, information corresponding to whether the value has changed;

performing a second parity check on the first portion;

in response to determining the second parity check is successful, incrementing a second parity check number that is associated with the first array;

determining a second threshold based on the stored information; and

selectively performing the additional parity checks on subsequent portions of the first array based on comparing the incremented second parity check number to the determined second threshold.

9. The method of claim 7 , wherein:

the threshold is a first threshold;

performing the first parity check comprises:

performing symbol-level parity checks on each of a plurality of symbols in the first data symbol,

for each successful symbol-level parity check, incrementing a symbol-level parity check number, and

comparing the symbol-level parity check number to a second threshold; and

determining that the first parity check is successful comprises:

in response to comparing the symbol-level parity check number to the second threshold, determining that the first parity check is successful.

10. A system for performing a parity check on encoded data, comprising:

control circuitry configured to:

receive the encoded data, the encoded data including a plurality of data symbols and a plurality of parity check symbols;

retrieve, from memory, a parity check matrix associated with the plurality of parity check symbols;

determine a first portion of an array of the received encoded data, the first portion of the array having a dimension of the parity check matrix, on which to perform a parity check;

perform, based on the parity check matrix associated with the plurality of parity check symbols, a first parity check on the first portion;

in response to determining the first parity check is successful, adjust a parity check number that is associated with the array;

selectively perform additional parity checks on subsequent portions of the array based on comparing the adjusted parity check number to a threshold;

in response to comparing the adjusted parity check number to the threshold, determine to perform the additional parity checks on subsequent portions of the array;

based on the additional parity checks, determine to change a value of a data symbol of the plurality of data symbols, the data symbol being associated with the array; and

in response to determining to change the value of the data symbol, store an index corresponding to the array in a buffer.

11. The system of claim 10 , wherein the array is a first array and the control circuitry is further configured to perform, during a same clock cycle as the first parity check, a second parity check on a second portion of a second array of the received encoded data, the second portion of the second array having the dimension of the parity check matrix, wherein the second array is different from the first array.

12. The system of claim 11 , wherein the control circuitry is further configured to select the second portion of the second array such that a first check node associated with the first portion is different from a second check node associated with the second portion.

13. The system of claim 12 , wherein the control circuitry is configured to:

store the adjusted parity check number in a first buffer;

perform a third parity check on a third portion of the first array;

in response to determining the third parity check is successful, increment the parity check number; and

store the incremented parity check number in the first buffer.

14. The system of claim 13 , wherein the control circuitry is further configured to:

store, in a second buffer, indices corresponding to the first and second arrays;

store, in a third buffer, first and second processed portion numbers;

increment the first processed portion number in response to performing the first parity check;

store the incremented first processed portion number in the third buffer;

further increment the first processed portion number in response to performing the third parity check;

store the further incremented first processed portion number in the third buffer;

increment the second processed portion number in response to performing the second parity check;

store the incremented second processed portion number in the third buffer;

select, based on the stored indices and processed portion numbers, a fourth portion of a third array of the dimension; and

perform a fourth parity check on the selected fourth portion.

15. The system of claim 10 , wherein the first portion is associated with a plurality of check nodes.

16. The system of claim 10 , wherein the array is a first array and the control circuitry is further configured to selectively perform additional parity checks by:

in response to comparing the adjusted parity check number to the threshold, determining not to perform the additional parity checks on subsequent portions of the first array; and

in response to comparing the adjusted parity check number to the threshold, determining not to change a value of another data symbol of the plurality of data symbols, the data symbol being associated with the first array.

17. The system of claim 16 , wherein the threshold is a first threshold and the control circuitry is further configured to perform a decoding iteration by:

storing, in a first buffer, information corresponding to whether the value has changed;

performing a second parity check on the first portion;

in response to determining the second parity check is successful, incrementing a second parity check number that is associated with the first array;

determining a second threshold based on the stored information; and

selectively performing the additional parity checks on subsequent portions of the first array based on comparing the incremented second parity check number to the determined second threshold.

18. The system of claim 16 , wherein the threshold is a first threshold and the control circuitry is further configured to:

perform the first parity check by:

performing symbol-level parity checks on each of a plurality of symbols in the first data symbol,

for each successful symbol-level parity check, incrementing a symbol-level parity check number, and

comparing the symbol-level parity check number to a second threshold; and

determine that the first parity check is successful by:

in response to comparing the symbol-level parity check number to the second threshold, determining that the first parity check is successful.