IP Library › Granted Patent US 9,666,723
Granted Patent B2
US 9,666,723 · App. 14/665,480 · Granted May 30, 2017

Semiconductor device

Inventor: Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869G11C11/404H01L27/0207H01L27/0733H01L27/1085H01L27/10873H01L27/1156H01L27/1225H01L27/1255H01L28/40H01L28/60H01L29/24H01L29/41733H01L29/78618H01L29/78696
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,666,723
App. No.
14/665,480
Granted
May 30, 2017
Kind
B2
Abstract

An object of the present invention is to provide a semiconductor device in which stored data can be held even when power is not supplied for a certain time. Another object is to increase the degree of integration of a semiconductor device and to increase the storage capacity per unit area. A semiconductor device is formed with a material capable of sufficiently reducing off-state current of a transistor, such as an oxide semiconductor material that is a wide-bandgap semiconductor. With the use of a semiconductor material capable of sufficiently reducing off-state current of a transistor, the semiconductor device can hold data for a long time. Furthermore, a wiring layer provided under a transistor, a high-resistance region in an oxide semiconductor film, and a source electrode are used to form a capacitor, thereby reducing the area occupied by the transistor and the capacitor.

Claims (55)

1. A semiconductor device comprising a memory cell, the memory cell comprising a transistor and a capacitor,

wherein the transistor comprises:

an oxide semiconductor film comprising:

a channel formation region;

a pair of first regions with the channel formation region therebetween; and

a pair of second regions with the channel formation region therebetween;

a source electrode layer and a drain electrode layer over the oxide semiconductor film;

a gate electrode layer over the oxide semiconductor film; and

a gate insulating film between the oxide semiconductor film and the gate electrode layer,

wherein the capacitor comprises one of the pair of the first regions and one of the pair of second regions,

wherein the one of the pair of first regions of the capacitor functions as a dielectric of the capacitor,

wherein the one of the pair of first regions and the one of the pair of second regions are stacked, and the other of the pair of first regions and the other of the pair of second regions are stacked,

wherein a resistance value of the pair of first regions is higher than a resistance value of the pair of second regions, and

wherein the oxide semiconductor film comprises a carrier concentration being less than or equal to 1×10 12 /cm 3 .

2. The semiconductor device according to claim 1 , wherein each of the pair of second regions comprises at least one selected from aluminum, titanium, molybdenum, tungsten, hafnium, tantalum, lanthanum, barium, magnesium, zirconium, and nickel.

3. The semiconductor device according to claim 1 , wherein each of the pair of first regions does not comprise any one of aluminum, titanium, molybdenum, tungsten, hafnium, tantalum, lanthanum, barium, magnesium, zirconium, and nickel.

4. The semiconductor device according to claim 1 , wherein the oxide semiconductor film comprises indium, zinc, and at least one selected from rare earth elements.

5. The semiconductor device according to claim 1 , wherein the oxide semiconductor film comprises indium, zinc, and at least one selected from zirconium, gadolinium, cerium, and titanium.

6. The semiconductor device according to claim 1 , wherein the oxide semiconductor film comprises a hydrogen concentration being less than or equal to 5×10 19 atoms/cm 3 .

7. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor film further comprises a pair of third regions, and

wherein each of the pair of third regions comprise a dopant.

8. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor film further comprises a pair of third regions,

wherein each of the pair of third regions comprise a dopant, and

wherein the dopant comprises at least one selected from phosphorus, arsenic, antimony, boron, aluminum, nitrogen, argon, helium, neon, indium, fluorine, chlorine, titanium, and zinc.

9. The semiconductor device according to claim 1 , wherein the capacitor further comprises a wiring layer in contact with a bottom surface of the one of the pair of first regions.

10. A semiconductor device comprising a memory cell, the memory cell comprising a transistor and a capacitor,

wherein the transistor comprises:

an oxide semiconductor film comprising:

a channel formation region;

a pair of first regions with the channel formation region therebetween; and

a pair of second regions with the channel formation region therebetween;

a source electrode layer and a drain electrode layer over the oxide semiconductor film;

a gate electrode layer over the oxide semiconductor film; and

a gate insulating film between the oxide semiconductor film and the gate electrode layer,

wherein the capacitor comprises one of the pair of first regions and one of the pair of second regions,

wherein the one of the pair of first regions of the capacitor functions as a dielectric of the capacitor,

wherein the one of the pair of first regions and the one of the pair of second regions are stacked, and the other of the pair of first regions and the other of the pair of second regions are stacked,

wherein a resistance value of the pair of first regions is higher than a resistance value of the pair of second regions, and

wherein an off-state current per micrometer of a channel width of the transistor is 1×10 −19 A/μm or less.

11. The semiconductor device according to claim 10 , wherein each of the pair of second regions comprises at least one selected from aluminum, titanium, molybdenum, tungsten, hafnium, tantalum, lanthanum, barium, magnesium, zirconium, and nickel.

12. The semiconductor device according to claim 10 , wherein each of the pair of first regions does not comprise any one of aluminum, titanium, molybdenum, tungsten, hafnium, tantalum, lanthanum, barium, magnesium, zirconium, and nickel.

13. The semiconductor device according to claim 10 , wherein the oxide semiconductor film comprises indium, zinc, and at least one selected from rare earth elements.

14. The semiconductor device according to claim 10 , wherein the oxide semiconductor film comprises indium, zinc, and at least one selected from zirconium, gadolinium, cerium, and titanium.

15. The semiconductor device according to claim 10 , wherein the oxide semiconductor film comprises a hydrogen concentration being less than or equal to 5×10 19 atoms/cm 3 .

16. The semiconductor device according to claim 10 , wherein the oxide semiconductor film comprises a carrier concentration being less than or equal to 1×10 12 /cm 3 .

17. The semiconductor device according to claim 10 ,

wherein the oxide semiconductor film further comprises a pair of third regions, and

wherein each of the pair of third regions comprise a dopant.

18. The semiconductor device according to claim 10 ,

wherein the oxide semiconductor film further comprises a pair of third regions,

wherein each of the pair of third regions comprise a dopant, and

wherein the dopant comprises at least one selected from phosphorus, arsenic, antimony, boron, aluminum, nitrogen, argon, helium, neon, indium, fluorine, chlorine, titanium, and zinc.

19. The semiconductor device according to claim 10 , wherein the capacitor further comprises a wiring layer in contact with a bottom surface of the one of the pair of first regions.

Priority Claims (1)
JP 2011-161329 · Jul 22, 2011 · national
Continuity (2)
Continuation 13549864 · Jul 16, 2012
Related Publication 20150194533A1 · Jul 9, 2015