System and method for voltage regulation of one-time-programmable (OTP) memory programming voltage
An integrated circuit is provided that allows for the use of the same supply voltage pin to receive both a normal operating voltage for the integrated circuit (IC) and a one-time-programmable (OTP) memory program voltage sufficient to program an OTP memory located on the integrated circuit. In one embodiment, when an OTP programming voltage is received at a supply voltage pin of the IC, the OTP programming voltage is provided to the OTP memory of the integrated circuit and the OTP programming voltage is regulated to the normal operating voltage level prior to providing the voltage to the internal circuitry of the integrated circuit. As such, the present invention establishes a dual-purpose supply voltage pin, thereby eliminating the need for a separate OTP programming voltage pin on the integrated circuit.
1. A method of providing a programming voltage to a one-time-programmable (OTP) memory of an integrated circuit, the method comprising:
receiving an external voltage, having an external voltage level, at a supply voltage pin of an integrated circuit, the external voltage level equal to a normal operating voltage level for the integrated circuit or to an OTP programming voltage level for an OTP memory of the integrated circuit;
if the external voltage level received at the supply voltage pin is the normal operating voltage level for the integrated circuit, providing the external voltage to the OTP memory of the integrated circuit and to internal circuitry of the integrated circuit; and
if the external voltage level received at the supply voltage pin is an OTP programming voltage level, providing the external voltage to the OTP memory of the integrated circuit and regulating the external voltage level to the normal operating voltage level of the integrated circuit to establish a normal operating voltage and providing the normal operating voltage to the internal circuitry of the integrated circuit.
2. The method of claim 1 , wherein regulating the external voltage level to the normal operating voltage level of the integrated circuit to establish a normal operating voltage and providing the normal operating voltage to the internal circuitry of the integrated circuit further comprises, providing the external voltage to an OTP programming voltage clamping regulator to regulate the OTP programming voltage level to the normal operating voltage level of the integrated circuit to establish the normal operating voltage.
3. The method of claim 2 , wherein providing the external voltage to an OTP programming voltage clamping regulator to regulate the OTP programming voltage level to the normal operating voltage level of the integrated circuit to establish the normal operating voltage further comprises, clamping the external voltage to the normal operating voltage level using a voltage clamping transistor.
4. The method of claim 1 , further comprising, regulating the normal operating voltage level of the integrated circuit to an internal operating voltage level of the integrated circuit to establish an internal operating voltage for the integrated circuit.
5. The method of claim 4 , wherein regulating the normal operating voltage of the integrated circuit to an internal operating voltage level of the integrated circuit to establish an internal operating voltage of the integrated circuit further comprises, providing the normal operating voltage to an internal voltage regulator to regulate the normal operating voltage level of the internal operating voltage to the internal operating voltage level.
6. The method of claim 1 , wherein the OTP programming voltage level of the OTP memory is 7V.
7. The method of claim 5 , wherein the normal operating voltage level of the integrated circuit is 3.3V and the internal operating voltage level of the integrated circuit is 1.8V.
8. The method of claim 1 , further comprising, if the external voltage level of the external voltage received at the supply voltage pin is the normal operating voltage level for the integrated circuit, providing the external voltage to an OTP programming voltage switch prior to providing the external voltage to the OTP memory of the integrated circuit.
9. The method of claim 1 , further comprising, if the external voltage level of the external voltage received at the supply voltage pin is an OTP programming voltage level, providing the external voltage to an OTP programming voltage switch prior to providing the external voltage to the OTP memory of the integrated circuit.
10. An integrated circuit (IC) comprising:
a one-time-programmable (OTP) memory;
an OTP programming voltage clamping regulator coupled to the OTP memory and to a supply voltage pin of an integrated circuit, the supply voltage pin for receiving an external voltage having an external voltage level, wherein the external voltage level is equal to a normal operating voltage level for the integrated circuit or to an OTP programming voltage level for the OTP memory of the integrated circuit; and
if the external voltage level received at the supply voltage pin is the normal operating voltage level for the integrated circuit, the OTP programming voltage clamping regulator configured to provide the external voltage to the OTP memory of the integrated circuit and to internal circuitry of the integrated circuit; and
if the external voltage level received at the supply voltage pin is the OTP programming voltage level, the OTP programming voltage clamping regulator configured to provide the external voltage to the OTP memory of the integrated circuit and the OTP programming voltage clamping regulator further configured to regulate the external voltage level to the normal operating voltage level of the integrated circuit to establish a normal operating voltage and to provide the normal operating voltage to the internal circuitry of the integrated circuit.
11. The integrated circuit of claim 10 , wherein the OTP programming voltage clamping regulator comprises a voltage clamping transistor coupled to the supply voltage pin, the voltage clamping transistor configured to clamp the OTP programming voltage level to the normal operating voltage level of the integrated circuit.
12. The integrated circuit of claim 10 , wherein the OTP programming voltage clamping regulator comprises:
a voltage clamping transistor having a source node coupled to the supply voltage pin; and
an operational amplifier having an output node coupled to a gate node of the voltage clamping transistor, a positive terminal coupled to a reference voltage and a negative terminal coupled to a drain node of the clamping transistor.
13. The integrated circuit of claim 10 , further comprising, an internal voltage regulator coupled to the OTP programming voltage clamping regulator, the internal voltage regulator configured to regulate the normal operating voltage level of the integrated circuit to an internal operating voltage level of the integrated circuit to establish an internal operating voltage for the integrated circuit.
14. The integrated circuit of claim 10 , wherein the OTP programming voltage level of the OTP memory is 7V.
15. The integrated circuit of claim 13 , wherein the normal operating voltage level of the integrated circuit is 3.3V and the internal operating voltage level of the integrated circuit is 1.8V.
16. The integrated circuit of claim 10 , further comprising, an OTP programming voltage switch coupled to the OTP memory and to the supply voltage pin, the OTP programming voltage switch configured to provide the external voltage to the OTP memory of the integrated circuit if the external voltage level of the external voltage received at the supply voltage pin is the normal operating voltage level for the integrated circuit, and the OTP programming voltage switch configured to provide the external voltage to the OTP memory of the integrated circuit if the external voltage level of the external voltage received at the supply voltage pin is an OTP programming voltage level.
17. The integrated circuit of claim 10 , further comprising an ESD clamping circuit coupled to the supply voltage pin.
18. The integrated circuit of claim 10 , wherein the OTP memory comprises at least one OTP memory cell.
19. The integrated circuit of claim 10 , wherein the OTP programming voltage level is sufficient to program the OTP memory.
20. An integrated circuit (IC) comprising:
a one-time-programmable (OTP) memory;
an OTP programming voltage clamping regulator comprising a clamping transistor having a source node coupled to the supply voltage pin and an operational amplifier having an output node coupled to a gate node of the voltage clamping transistor, a positive terminal coupled to a reference voltage and a negative terminal coupled to a drain node of the clamping transistor, the supply voltage pin for receiving an external voltage having an external voltage level, wherein the external voltage level is equal to a normal operating voltage level for the integrated circuit or to an OTP programming voltage level for the OTP memory of the integrated circuit; and
if the external voltage level received at the supply voltage pin is the normal operating voltage level for the integrated circuit, the OTP programming voltage clamping regulator configured to provide the external voltage to the OTP memory of the integrated circuit and to internal circuitry of the integrated circuit; and
if the external voltage level received at the supply voltage pin is the OTP programming voltage level, the OTP programming voltage clamping regulator configured to provide the external voltage to the OTP memory of the integrated circuit and the OTP programming voltage clamping regulator further configured to regulate the external voltage level to the normal operating voltage level of the integrated circuit to establish a normal operating voltage and to provide the normal operating voltage to the internal circuitry of the integrated circuit.