Immunity of phase change material to disturb in the amorphous phase
View Patent ↗Disturb from the reset to the set state may be reduced by creating an amorphous phase that is substantially free of crystal nuclei when programming the reset state in a phase change memory. In some embodiments, this can be achieved by using a current or a voltage to program that exceeds the threshold voltage of the phase change memory element, but does not exceed a safe current voltage which would cause a disturb.
1. A method comprising:
programming a field programmable gate array, the field programmable gate array including an ovonic unified memory and an ovonic threshold switch, the ovonic unified memory comprising a phase change material, the phase change material having a plurality of memory states, each of the memory states having a threshold voltage, the memory states including a reset state, the reset state having a threshold voltage higher than the threshold voltage of any of the other memory states, the programming transforming the phase change material to the reset state;
applying a refresh pulse to the field programmable gate array, the refresh pulse having a voltage higher than the threshold voltage of the reset state.
2. The method of claim 1 further comprising applying a first read pulse to the phase change material, the first read pulse following the refresh pulse.
3. The method of claim 2 wherein the first read pulse has a voltage that is less than or equal to a voltage of the refresh pulse.
4. The method of claim 1 further comprising applying a second read pulse to said phase change material, said second read pulse following said first read pulse.
5. The method of claim 4 further comprising determining a state of the phase change material after the applying the second read pulse.
6. The method of claim 1 , wherein the reset state comprises an amorphous phase substantially free of crystal nuclei.
7. The method of claim 1 , wherein the refresh pulse is applied after the programming by a delay time, the threshold voltage of the reset state varying during the delay time, the refresh pulse having voltage higher than the threshold voltage that the reset state has after the delay time.
8. The method of claim 2 , wherein the refresh pulse has a pulse width less than the pulse width of the read pulse.
9. The method of claim 1 , wherein said phase change material comprises In.
10. The method of claim 9 , wherein said phase change material further comprises Sb.
11. The method of claim 10 , wherein said phase change material further comprises Te.