IP Library Granted Patent US 9,263,128
Granted Patent B2
US 9,263,128 · App. 14/679,781 · Granted Feb 16, 2016

Methods and apparatuses for programming memory cells

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Quick Facts
Patent No.
US 9,263,128
App. No.
14/679,781
Granted
Feb 16, 2016
Kind
B2
Abstract

Methods and apparatus for programming memory cells in a memory array are disclosed. A most recent programming time is determined, the most recent programming time being a time when a most recent programming operation was applied to a reference memory cell in the memory array. A programming signal is then applied to a target memory cell in the memory array, the programming signal having a programming parameter which depends at least in part on the most recent programming time.

Claims (32)

1. A method of programming a target memory cell, comprising:

applying a programming signal to the target memory cell,

wherein the programming signal comprises a parameter which depends on a time value indicative of a most recent programming time, and

wherein the most recent programming time is a time when a most recent programming operation was performed upon a reference memory cell.

2. The method of claim 1 , wherein the time value is indicative of an hour and a date of the most recent programming time.

3. The method of claim 1 , wherein the time value is indicative of a time period elapsed from the most recent programming time.

4. The method of claim 1 , wherein the most recent programming operation comprises a programming operation for transitioning the reference memory cell from a reference memory cell set state to a reference memory cell reset state.

5. The method of claim 1 , further comprising updating the time value in response to performing a programming operation comprising applying a programming signal to the target memory cell.

6. The method of claim 1 , further comprising comparing the time value with at least one threshold time value of a plurality of threshold time values, wherein the parameter of the programming signal is based on the comparing the time value with the at least one threshold time value.

7. The method of claim 6 , further comprising storing the plurality of threshold time values and a corresponding programming signal parameter value associated with each of the plurality of threshold time values in a look-up table.

8. The method of claim 7 , wherein applying the programming signal comprises selecting a programming signal parameter value from the look-up table based on comparing the time value with the at least one threshold time value, and applying a programming signal to the target memory cell comprising the programming signal parameter value.

9. A memory device, comprising:

a memory controller configured to perform a programming operation to program a target memory cell, wherein the programming operation comprises:

applying a programming signal to the target memory cell,

wherein the programming signal comprises a parameter which depends on a time value indicative of a most recent programming time, and

wherein the most recent programming time is a time when a most recent programming operation was performed upon a reference memory cell.

10. The memory device of claim 9 , wherein the memory controller is further configured to determine a period of time elapsed from the most recent programming time, and wherein the parameter depends upon the period of time.

11. The memory device of claim 9 , wherein the parameter comprises at least one of a duration of a programming signal pulse, a programming signal pulse amplitude, a programming signal pulse shape and a number of programming signal pulses.

12. The memory device of claim 9 , wherein the memory controller is further configured to update the time value in response to a trigger event, wherein the trigger event comprises at least one of powering-on of the memory device and passage of a predetermined period of time.

13. The memory device of claim 12 , wherein the memory controller is further configured to update the time value to a predetermined time value if the most recent programming time is older than a threshold time, the predetermined time value being a single time value for all most recent programming times older than the threshold time.

14. The memory device of claim 9 , further comprising a memory array, wherein the target memory cell and the reference memory cell are in the same sector, page, tile or block of the memory array.

15. The memory device of claim 14 , wherein the memory controller is further configured to update the time value each time a memory cell within the sector, page, tile or block of the memory array is programmed.

16. A system, comprising:

a memory controller configured to perform a programming operation to program a target memory cell, wherein the programming operation comprises:

applying a programming signal to the target memory cell,

wherein the programming signal comprises a parameter which depends on a time value indicative of a most recent programming time, and

wherein the most recent programming time is a time when a most recent programming operation was performed upon a reference memory cell; and

a processor configured to initiate a command for programming the target memory cell.

17. The system of claim 16 , wherein the memory controller is further configured to compare the time value with at least one threshold time value of a plurality of threshold time values, wherein the parameter of the programming signal is based on the comparing the time value with the at least one threshold time value.

18. The system of claim 17 , wherein the system further comprises a look-up table, and the memory controller is further configured to store the plurality of threshold time values and a programming signal parameter value associated with each of the plurality of threshold time values in the look-up table.

19. The system of claim 16 , wherein the parameter comprises at least one of a duration of a programming signal pulse, a programming signal pulse amplitude, a programming signal pulse shape and a number of programming signal pulses.

20. The system of claim 16 , wherein the target memory cell and the reference memory cell are phase change memory cells.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →