Microelectronic substrate having embedded trace layers with integral attachment structures
A microelectronic substrate may be formed to have an embedded trace which includes an integral attachment structure that extends beyond a first surface of a dielectric layer of the microelectronic substrate for the attachment of a microelectronic device. In one embodiment, the embedded trace may be fabricated by forming a dummy layer, forming a recess in the dummy layer, conformally depositing surface finish in the recess, forming an embedded trace layer on the dummy layer and abutting the surface finish, and removing the dummy layer.
1. A method of fabricating a microelectronic structure, comprising:
forming a dummy layer;
forming at least one recess in the dummy layer;
conformally depositing a surface finish in the at least one recess;
forming an embedded trace layer on the dummy layer and abutting the surface finish, wherein forming the embedded trace layer comprises forming an embedded trace mask on the dummy layer, wherein the embedded trace mask includes openings therethrough, and depositing an embedded trace layer through the embedded trace mask openings;
forming a dielectric material layer on the embedded trace layer and the dummy layer; and
removing the dummy layer.
2. The method of claim 1 , wherein forming the recess in the dummy layer comprises:
forming an etch mask on the dummy layer wherein the etch mask includes openings therethrough; and
etching the dummy layer to form the recesses.
3. The method of claim 2 , wherein conformally depositing the surface finish comprises conformally depositing the surface finish through the etch mask.
4. The method of claim 1 , further including forming at least one conductive via through the dielectric material layer to contact the at least one embedded trace and forming at least one conductive trace contacting the conductive via prior to removing the dummy layer.
5. The method of claim 1 , wherein forming the embedded trace layer comprises forming the embedded trace layer from the same material as the dummy layer.
6. The method of claim 1 , wherein forming the dummy layer comprises forming a dummy metal layer.
7. The method of claim 6 , wherein forming the dummy metal layer comprises forming a dummy copper layer.
8. The method of claim 1 , wherein forming the embedded trace layer comprises forming an embedded metal trace layer.
9. The method of claim 8 , wherein forming the embedded metal trace layer comprises forming an embedded copper trace layer.
10. A method of fabricating a microelectronic structure, comprising:
forming a dummy layer;
forming an etch mask on the dummy layer, wherein the etch mask includes openings therethrough;
etching the dummy layer to form at least one recess;
conformally depositing a surface finish in the at least one recess through the etch mask;
removing the etch mask;
forming an embedded trace mask on the dummy layer, wherein the embedded trace mask includes openings therethrough;
depositing an embedded trace layer through the embedded trace mask openings, wherein the embedded trace layer abuts a portion of the dummy layer and the surface finish;
forming a dielectric material layer on the embedded trace layer and the dummy layer; and
removing the dummy layer.
11. The method of claim 10 , further including forming at least one conductive via through the dielectric material layer to contact the at least one embedded trace and forming at least one conductive trace contacting the conductive via prior to removing the dummy layer.
12. The method of claim 10 , wherein forming the embedded trace material layer comprises forming the embedded trace layer from the same material as the dummy layer.
13. The method of claim 10 , wherein forming the dummy layer comprises forming a dummy metal layer.
14. The method of claim 13 , wherein forming the dummy metal layer comprises forming a dummy copper layer.
15. The method of claim 10 , wherein forming the embedded trace layer comprises forming an embedded metal trace layer.
16. The method of claim 15 , wherein forming the embedded metal trace layer comprises forming an embedded copper trace layer.
17. A method of fabricating a microelectronic structure, comprising:
forming a dummy layer;
forming at least one recess in the dummy layer;
conformally depositing a surface finish in the at least one recess;
forming an embedded trace layer on the dummy layer and abutting the surface finish;
forming a dielectric material layer on the embedded trace layer and the dummy layer;
forming at least one conductive via through the dielectric material layer to contact the at least one embedded trace and forming at least one conductive trace contacting the conductive via; and
removing the dummy layer.
18. The method of claim 17 , wherein forming the recess in the dummy layer comprises:
forming an etch mask on the dummy layer wherein the etch mask includes openings therethrough; and
etching the dummy layer to form the recesses.
19. The method of claim 18 , wherein conformally depositing the surface finish comprises conformally depositing the surface finish through the etch mask.
20. The method of claim 17 , wherein forming the embedded trace layer comprises forming the embedded trace layer from the same material as the dummy layer.
21. The method of claim 17 , wherein forming the dummy layer comprises forming a dummy metal layer.
22. The method of claim 21 , wherein forming the dummy metal layer comprises forming a dummy copper layer.
23. The method of claim 17 , wherein forming the embedded trace layer comprises forming an embedded metal trace layer.
24. The method of claim 23 , wherein forming the embedded metal trace layer comprises forming an embedded copper trace layer.
25. A method of fabricating a microelectronic structure, comprising:
forming a dummy layer;
forming at least one recess in the dummy layer;
conformally depositing a surface finish in the at least one recess;
forming an embedded trace layer on the dummy layer and abutting the surface finish, wherein the embedded trace layer comprises the same material as the dummy layer;
forming a dielectric material layer on the embedded trace layer and the dummy layer; and
removing the dummy layer.
26. The method of claim 25 , wherein forming the recess in the dummy layer comprises:
forming an etch mask on the dummy layer wherein the etch mask includes openings therethrough; and
etching the dummy layer to form the recesses.
27. The method of claim 26 , wherein conformally depositing the surface finish comprises conformally depositing the surface finish through the etch mask.
28. The method of claim 25 , further including forming at least one conductive via through the dielectric material layer to contact the at least one embedded trace and forming at least one conductive trace contacting the conductive via prior to removing the dummy layer.
29. The method of claim 25 , wherein forming the dummy layer comprises forming a dummy metal layer.
30. The method of claim 29 , wherein forming the dummy metal layer comprises forming a dummy copper layer.
31. The method of claim 25 , wherein forming the embedded trace layer comprises forming an embedded metal trace layer.
32. The method of claim 31 , wherein forming the embedded metal trace layer comprises forming an embedded copper trace layer.