IP Library Granted Patent US 9,614,109
Granted Patent B2
US 9,614,109 · App. 14/683,524 · Granted Apr 4, 2017

Photodiode and photodiode array

Inventors: Kazuhisa Yamamura (Hamamatsu, JP); Akira Sakamoto (Hamamatsu, JP); Terumasa Nagano (Hamamatsu, JP); Yoshitaka Ishikawa (Hamamatsu, JP); Satoshi Kawai (Hamamatsu, JP)
Assignee: HAMAMATSU PHOTONICS K.K.
H01L31/02366H01L27/1446H01L27/1464H01L31/0236H01L31/107H01L31/1804Y02E10/547
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Quick Facts
Patent No.
US 9,614,109
App. No.
14/683,524
Granted
Apr 4, 2017
Kind
B2
Abstract

A p − type semiconductor substrate 20 has a first principal surface 20 a and a second principal surface 20 b opposed to each other and includes a photosensitive region 21 . The photosensitive region 21 is composed of an n + type impurity region 23 , a p + type impurity region 25 , and a region to be depleted with application of a bias voltage in the p − type semiconductor substrate 20 . An irregular asperity 10 is formed in the second principal surface 20 b of the p − type semiconductor substrate 20 . An accumulation layer 37 is formed on the second principal surface 20 b side of the p − type semiconductor substrate 20 and a region in the accumulation layer 37 opposed to the photosensitive region 21 is optically exposed.

Claims (10)

1. A photodiode comprising:

a silicon substrate comprised of a semiconductor of a first conductivity type and having a first principal surface and a second principal surface opposed to each other,

wherein an avalanche photodiode composed of a pn junction between a semiconductor region of the first conductivity type having a higher impurity concentration than the silicon substrate and a semiconductor region of a second conductivity type is arranged on the first principal surface side of the silicon substrate,

wherein on the second principal surface side of the silicon substrate, an accumulation layer of the first conductivity type having a higher impurity concentration than the silicon substrate is formed and an irregular asperity is formed in at least a region opposed to the avalanche photodiode,

wherein the region opposed to the avalanche photodiode in the second principal surface of the silicon substrate is optically exposed, and

wherein the second principal surface where the irregular asperity is formed in at least the region opposed to the avalanche photodiode constitutes a light incident surface, light incident from the second principal surface travels in the silicon substrate, the photodiode being a back-illuminated type.

2. The photodiode according to claim 1 , wherein in the silicon substrate, a portion corresponding to the semiconductor region of the second conductivity type is thinned from the second principal surface side while leaving a surrounding region around said thinned portion.

3. The photodiode according to claim 1 , wherein a thickness of the accumulation layer of the first conductivity type is larger than a height difference of the irregular asperity.

4. The photodiode according to claim 1 , wherein the light incident from the second principal surface and traveling in the silicon substrate is reflected, scattered, or diffused by the irregular asperity.

5. The photodiode according to claim 1 , wherein the irregular asperity is formed by applying pulsed laser beam.

Assignments (2)
COURT ORDER Recorded May 27, 2021
From: HAMAMATSU PHOTONICS K.K.
To: SIONYX, LLC
Reel/Frame 056369/0631 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2015
From: YAMAMURA, KAZUHISA; SAKAMOTO, AKIRA; NAGANO, TERUMASA; ISHIKAWA, YOSHITAKA; KAWAI, SATOSHI
To: HAMAMATSU PHOTONICS K.K.
Reel/Frame 035382/0711 →
Priority Claims (2)
JP 2009-041078 · Feb 24, 2009 · national
JP 2009-136426 · Jun 5, 2009 · national
Continuity (2)
Continuation 13202244
Related Publication 20150214395A1 · Jul 30, 2015