Some embodiments disclose a gate stack having a gate (e.g., polysilicon (poly) material) horizontally between shallow trench isolations (STIs), a tungsten silicide (WSix) material over the gate and the STIs, and a tungsten silicon nitride (WSiN) material on a top surface of the WSix material. Some embodiments disclose a gate stack having a gate between STIs, a first WSix material over the gate and the STIs, a WSiN interlayer material on a top surface of the first WSix material, and a second WSix material on a top surface of the WSiN interlayer material. Additional embodiments are disclosed.
1. A gate stack, comprising:
a gate horizontally between shallow trench isolations (STIs) and directly contacting the STIs, a height of the gate being different from a height of the STIs;
a tungsten silicide (WSix) material on a top surface of the gate and top surfaces of the STIs; and
a tungsten silicon nitride (WSiN) material on a top surface of the WSix material.
2. The gate stack of claim 1 , further comprising:
a dielectric material over the WSiN material.
3. The gate stack of claim 2 , wherein the dielectric material comprises tetraethyl orthosilicate (TEOS).
4. The gate stack of claim 1 , further comprising:
a channel under the gate.
5. The gate stack of claim 4 , wherein the channel comprises silicon.
6. The gate stack of claim 4 , further comprising:
a gate oxide between the gate and the channel.
7. The gate stack of claim 1 , wherein the STIs comprise silicon oxide.
8. The gate stack of claim 1 , wherein the gate comprises a polysilicon (poly) material.
9. A gate stack, comprising:
a gate horizontally between shallow trench isolations (STIs) and directly contacting the STIs, a height of the gate being different from a height of the STIs;
a first tungsten silicide (WSix) material on a top surface of the gate and top surfaces of the STIs;
a tungsten silicon nitride (WSiN) interlayer material on a top surface of the first WSix material; and
a second WSix material on a top surface of the WSiN interlayer material.
10. The gate stack of claim 9 , further comprising:
a tetraethyl orthosilicate (TEOS) material over the second WSix material.
11. The gate stack of claim 9 , further comprising:
a channel under the gate; and
a gate oxide between the gate and the channel.
12. A method of making a gate stack, comprising:
forming a gate horizontally between shallow trench isolations (STIs) and directly contacting the STIs, a height of the gate being different from a height of the STIs;
forming a tungsten silicide (WSix) material on a top surface of the gate and top surfaces of the STIs; and
forming a tungsten silicon nitride (WSiN) material on a top surface of the WSix material.
13. The method of claim 12 , further comprising:
forming a dielectric material over the WSiN material.
14. The method of claim 12 , wherein forming the WSix material comprises depositing, in a chamber, WSix on a top surface of the gate and top surfaces of the STIs.
15. The method of claim 14 , wherein forming the WSiN material comprises sputtering WSix on the top surface of the WSix material in the chamber, while adding a nitrogen gas into the chamber, to incorporate nitrogen into the sputtered WSix to form the WSiN material.
16. The method of claim 14 , wherein forming the WSiN material comprises adding nitrogen while forming an upper portion of the WSix material to incorporate nitrogen into the upper portion of the WSix material to form the WSiN material.
17. The method of claim 14 , wherein forming the WSiN material comprises sputtering WSiN on the top surface of the WSix material in the chamber to form the WSiN material.
18. The method of claim 14 , wherein the chamber comprises a physical vapor deposition (PVD) chamber.
19. The method of claim 14 , wherein forming the WSiN material comprises depositing WSiN on the top surface of the WSix material in a Chemical Vapor Deposition (CVD) chamber.
20. The method of claim 14 , wherein forming the WSiN material comprises implanting nitrogen into an upper portion of the WSix material in an implant chamber to transform the upper portion of the WSix material into the WSiN material.
21. A method of making a gate stack, comprising:
forming a gate horizontally between shallow trench isolations (STIs) and directly contacting the STIs, a height of the gate being different from a height of the STIs;
forming a first tungsten silicide (WSix) material on a top surface of the gate and top surfaces of the STIs;
forming a tungsten silicon nitride (WSiN) interlayer material on a top surface of the first WSix material; and
forming a second WSix material on a top surface of the WSiN interlayer material.
22. The method of claim 21 , wherein forming the first WSix material comprises depositing, in a chamber, WSix on the top surface of the gate and the top surfaces of the STIs.
23. The method of claim 22 , wherein forming the WSiN interlayer material comprises sputtering WSix on the top surface of the first WSix material in the chamber, while adding a nitrogen gas into the chamber, to incorporate nitrogen into the sputtered WSix to form the WSiN interlayer material.
24. The method of claim 22 , wherein forming the WSiN interlayer material comprises implanting nitrogen into an upper portion of the first WSix material in an implant chamber to transform the upper portion of the first WSix material into the WSiN interlayer material.
25. The method of claim 22 , wherein forming the WSiN interlayer material comprises sputtering WSiN on the top surface of the first WSix material in the chamber to form the WSiN interlayer material.
26. The method of claim 22 , wherein forming the second WSix material comprises depositing, in the chamber, WSix on the top surface of the WSiN interlayer material.
27. A gate stack, comprising:
a gate between first and second dielectric materials and directly contacting the first and second dielectric materials, the gate including a height different from a height of each of the first and second dielectric materials;
a silicide material on a top surface of the gate and on top surfaces of the first and second dielectric materials; and
a combination of metal and silicon nitride material on a top surface of the silicide material.
28. The gate stack of claim 27 , wherein the silicide material comprises tungsten silicide (WSix).
29. The gate stack of claim 28 , wherein the combination of metal and silicon nitride comprises tungsten silicon nitride (WSiN).
30. The gate stack of claim 27 , wherein the first and second dielectric materials comprise silicon oxide.
31. The gate stack of claim 27 , further comprising a gate oxide under the gate and between the first and second dielectric materials and directly contacting the first and second dielectric materials.
32. The gate stack of claim 31 , further comprising a channel under the gate oxide and between the first and second dielectric materials and directly contacting the first and second dielectric materials.