Semiconductor integrated circuit device having encapsulation film and method of fabricating the same

1. A semiconductor integrated circuit device comprising:

a resistive layer; and

an encapsulation film formed to surround an outer wall of the resistive layer, wherein the encapsulation film contains an oxygen absorbing ingredient,

wherein the encapsulation film includes:

a first insulating layer formed to surround the outer wall of the resistive layer;

an oxygen absorbing layer formed to surround an outer wall of the first insulating layer; and

a second insulating layer formed to surround an outer wall of the oxygen absorbing layer.

2. The semiconductor integrated circuit device of claim 1 , wherein the oxygen absorbing ingredient includes at least one of a metal ingredient and a semiconductor ingredient.

3. The semiconductor integrated circuit device of claim 1 , wherein the first and second insulating layers include a silicon nitride layer or a silicon oxide layer.

4. The semiconductor integrated circuit device of claim 1 , wherein the oxygen absorbing layer includes at least one of a metal layer including titanium (Ti), tantalum (Ta), or cobalt (Co), and a semiconductor layer including germanium (Ge) or silicon (Si).

5. The semiconductor integrated circuit device of claim 1 , further comprising:

a lower electrode formed below the resistive layer; and

an upper electrode formed over the resistive layer.

6. The semiconductor integrated circuit device of claim 5 , wherein the encapsulation film is formed to surround an outer wall of the lower electrode, the resistive layer, and the upper electrode.

7. A semiconductor integrated circuit device comprising:

a plurality of resistive pillars;

a plurality of encapsulation films formed to surround the resistive pillars, wherein each of the encapsulation films includes an oxygen absorbing layer; and

a gap-fill insulating layer filled between the resistive pillar,

wherein each of the encapsulation films comprises:

a first insulating layer formed to surround the resistive pillars;

the oxygen absorbing layer formed to surround an outer wall of the first insulating layer; and

a second insulating layer formed to surround an outer wall of the oxygen absorbing layer.

8. The semiconductor integrated circuit device of claim 7 , wherein each of the resistive pillars includes a phase-change material layer.

9. The semiconductor integrated circuit device of claim 7 , wherein each of the resistive pillars includes a stacked structure of a lower electrode, a phase-change pattern, and an upper electrode.

10. The semiconductor integrated circuit device of claim 7 , wherein the oxygen absorbing layer includes at least one of a metal layer including titanium (Ti), tantalum (Ta), or cobalt (Co), and a semiconductor layer including germanium (Ge) or silicon (Si).

11. The semiconductor integrated circuit device of claim 7 , wherein the first and second insulating layers include a silicon oxide layer or a silicon nitride layer.

12. The semiconductor integrated circuit device of claim 9 , further comprising:

a bit line formed over the gap-fill insulating layer and in contact with the upper electrode.

13. A method of fabricating a semiconductor integrated circuit device, the method comprising:

forming a plurality of resistive pillars over a base layer; and

forming a plurality of encapsulation films to surround the resistive pillars, each including an oxygen absorbing layer,

wherein the forming of the plurality of encapsulation films includes:

forming a first insulating layer along a resultant structure including the resistive pillars;

forming the oxygen absorbing layer over the first insulating layer;

forming a second insulating layer over the oxygen absorbing layer; and

etching the insulating layer, the oxygen absorbing layer, and the second insulating layer to form the encapsulation films.

14. The method of claim 13 , wherein the first and second insulating layers include a silicon oxide layer or a silicon nitride layer.

15. The method of claim 13 , wherein the oxygen absorbing layer includes at least one of a metal layer including titanium (Ti), tantalum (Ta), or cobalt (Co), and a semiconductor layer including germanium (Ge) or silicon (Si).

16. The method of claim 13 , wherein the first insulating layer, the oxygen absorbing layer, and the second insulating layer are formed by a low-temperature atomic layer deposition (ALD) method.

17. The method of claim 13 , further comprising:

forming a gap-fill insulating layer over a resultant structure including the resistive pillars and the encapsulation films;

forming a contact hole by etching the gap-fill insulating layer until a top surface of the resistive pillars is exposed; and

forming a bit line over the gap-fill insulating layer to fill the contact hole.