IP Library Granted Patent US 9,842,633
Granted Patent B2
US 9,842,633 · App. 14/692,346 · Granted Dec 12, 2017

Tracking and correction of timing signals

Inventor: Gregory A. King (Hastings, MN)
Assignee: Micron Technology, Inc.
G11C7/22G06F1/10G11C7/12G11C7/222
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,842,633
App. No.
14/692,346
Granted
Dec 12, 2017
Kind
B2
Abstract

Various embodiments include apparatus and methods to track and/or correct timing signals. Timing signals generated from an interface can be compared to the timing signals returned to the interface. A timing delta from the comparison can be applied to calculate a correction value make adjustments that can include adjustment to a subsequent timing signal, adjustment to a reference voltage setting associated with the subsequent timing signal, other adjustments, or combinations thereof. Additional apparatus, systems, and methods are disclosed.

Claims (59)

1. An apparatus comprising:

an interface to transmit a timing signal to a plurality of dies, at least one of the dies having a voltage domain different from other dies of the plurality;

timing compare circuitry to compare the timing signal to a return timing signal and to provide a timing delta from the comparison;

a correction module to calculate one or more correction values to adjust a subsequent timing signal, a reference voltage setting associated with the timing signal, or both a subsequent timing signal and a reference voltage setting associated with the timing signal, the calculation based on voltage shift data derived from the timing delta and based on one or more ratios from a group of ratios including a ratio of timing steps to reference steps, a ratio of timing steps to duty cycle control steps, and both a ratio of timing steps to reference steps and a ratio of timing steps to duty cycle control steps, the voltage shift data including approximate voltage change due to the respective voltage domain differences; and

a controller to apply the one or more correction values to the subsequent timing signal, the reference voltage setting, or both the subsequent timing signal and the reference voltage setting.

2. The apparatus of claim 1 , wherein the timing signal includes a clock signal, a strobe signal, or both a clock signal and a strobe signal and the subsequent timing signal comprises a subsequent clock signal, a subsequent strobe signal, or both a subsequent clock signal and a subsequent strobe signal.

3. The apparatus of claim 2 , wherein the correction value to adjust a subsequent clock signal includes a value to pre-skew the subsequent clock signal.

4. The apparatus of claim 1 , wherein the interface, the timing compare circuitry, the correction module, and the controller are disposed in a controller die coupled to a die stack, the die stack having the plurality of dies.

5. The apparatus of claim 1 , wherein the interface, the timing compare circuitry, the correction module, and the controller are disposed in a process control block to apply the correction value to a part to part connection.

6. An apparatus comprising:

an interface to transmit a timing signal;

timing compare circuitry to compare the timing signal to a return timing signal and to provide a timing delta from the comparison;

a correction module to calculate a correction value to adjust a subsequent timing signal or to adjust a reference voltage setting associated with the timing signal, the calculation based on voltage shift data derived from the timing delta; and

a controller to apply the correction value to the subsequent timing signal or to the reference voltage setting, wherein the correction module includes comparison circuitry to generate the correction value.

7. An apparatus comprising:

an interface to transmit a timing signal;

timing compare circuitry to compare the timing signal to a return timing signal and to provide a timing delta from the comparison;

a correction module to calculate a correction value to adjust a subsequent timing signal or to adjust a reference voltage setting associated with the timing signal, the calculation based on voltage shift data derived from the timing delta; and

a controller to apply the correction value to the subsequent timing signal or to the reference voltage setting, wherein the correction module includes firmware code structures in firmware to generate the correction value.

8. An apparatus comprising:

a first die having a first voltage domain;

a second die having a second voltage domain, the second voltage domain independent of the first voltage domain;

an interface to transmit a timing signal from the first die to the second die;

timing compare circuitry to compare the timing signal to a return timing signal from the second die and to provide a timing delta from the comparison;

a correction module to calculate one or more Hall correction values to adjust a subsequent timing signal from the first die to the second die, a reference voltage setting associated with the timing signal, or both a subsequent timing signal from the first die to the second die and a reference voltage setting associated with the timing signal, the calculation based on voltage shift data derived from the timing delta and based on one or more ratios from a group of ratios including a ratio of timing steps to reference steps, a ratio of timing steps to duty cycle control steps, and both a ratio of timing steps to reference steps and a ratio of timing steps to duty cycle control steps, the voltage shift data including approximate voltage change due to the respective voltage domain differences; and

a controller to apply the one or more correction values to the subsequent timing signal, the reference voltage setting, or both the subsequent timing signal and the reference voltage setting.

9. The apparatus of claim 8 , wherein the interface, the timing compare circuitry, the correction module, and the controller are disposed in a controller die operatively coupled to the first die and the second die.

10. An apparatus comprising:

a first die having a first voltage domain;

a second die having a second voltage domain, the second voltage domain independent of the first voltage domain;

an interface to transmit a timing signal from the first die to the second die;

timing compare circuitry to compare the timing signal to a return timing signal from the second die and to provide a timing delta from the comparison;

a correction module to calculate a correction value to adjust a subsequent timing signal from the first die to the second die or to adjust a reference voltage setting associated with the timing signal, the calculation based on voltage shift data derived from the timing delta; and

a controller to apply the correction value to the subsequent timing signal or the reference voltage setting, wherein the timing compare circuitry includes tracking circuitry to use a return read strobe to track.

11. An apparatus comprising:

a first die having a first voltage domain;

a second die having a second voltage domain, the second voltage domain independent of the first voltage domain;

an interface to transmit a timing signal from the first die to the second die;

timing compare circuitry to compare the timing signal to a return timing signal from the second die and to provide a timing delta from the comparison;

a correction module to calculate a correction value to adjust a subsequent timing signal from the first die to the second die or to adjust a reference voltage setting associated with the timing signal, the calculation based on voltage shift data derived from the timing delta; and

a controller to apply the correction value to the subsequent timing signal or the reference voltage setting, wherein the correction module is arranged to monitor the timing delta, to track accumulation of timing delta, and to compare the accumulation to a threshold to calculate the correction value.

12. An apparatus comprising:

a first die having a first voltage domain;

a second die having a second voltage domain, the second voltage domain independent of the first voltage domain;

an interface to transmit a timing signal from the first die to the second die;

timing compare circuitry to compare the timing signal to a return timing signal from the second die and to provide a timing delta from the comparison;

a correction module to calculate a correction value to adjust a subsequent timing signal from the first die to the second die or to adjust a reference voltage setting associated with the timing signal, the calculation based on voltage shift data derived from the timing delta; and

a controller to apply the correction value to the subsequent timing signal or the reference voltage setting, wherein the apparatus includes stored instructions to translate the timing delta into an offset to apply to a duty cycle of the first die.

13. A method comprising:

transmitting a timing signal from an interface to a plurality of dies, at least one of the dies having a voltage domain different from other dies of the plurality;

comparing, using timing compare circuitry, the timing signal to a return timing signal in timing compare circuitry;

generating, using the timing compare circuitry, a timing delta from the comparison;

calculating, in a correction module, a correction value one or more correction values to adjust a subsequent timing signal, a reference voltage setting associated with the timing signal, or both a subsequent timing signal and a reference voltage setting associated with the timing signal, the correction value based on voltage shift data derived from the timing delta and based on one or more ratios from a group of ratios including a ratio of timing steps to reference steps, a ratio of timing steps to duty cycle control steps, and both a ratio of timing steps to reference steps and a ratio of timing steps to duty cycle control steps, the voltage shift data including approximate voltage change due to the respective voltage domain differences; and

adjusting the subsequent timing signal, the reference voltage setting, or both the subsequent timing signal and the reference voltage setting by applying the one or more correction values using a controller.

14. The method of claim 13 , wherein transmitting the timing signal includes transmitting a clock signal, a strobe signal, or both a clock signal and a strobe signal and adjusting the subsequent timing signal includes adjusting a subsequent clock signal, a subsequent strobe signal, or both a subsequent clock signal and a subsequent strobe signal.

15. The method of claim 14 , wherein adjusting the subsequent clock signal includes pre-skewing the subsequent clock signal.

16. The method of claim 13 , wherein the transmitting, the comparing, the generating, the calculating, and the adjusting are performed in a controller die coupled to a die stack, the die stack having a plurality of dies.

17. The method of claim 13 , wherein calculating the correction value includes executing codes stored in a firmware structure to generate the correction value.

18. The method of claim 13 , wherein the transmitting and the comparing include using a read strobe and a return read strobe.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2015
From: KING, GREGORY A
To: MICRON TECHNOLOGY, INC.
Reel/Frame 035527/0386 →
Continuity (2)
Provisional Application 62090815 · Dec 11, 2014
Related Publication 20160172017A1 · Jun 16, 2016