IP Library Granted Patent US 9,306,564
Granted Patent B2
US 9,306,564 · App. 14/695,260 · Granted Apr 5, 2016

Nonvolatile memory device with on-die control and data signal termination

Inventors: Kyung Suk Oh (Cupertino, CA); Ian P. Shaeffer (Los Gatos, CA)
Assignee: Rambus Inc.
H03K19/0005G06F13/4086G11C11/401G11C11/4063G11C11/4093G11C11/41G11C11/413G11C11/417G11C11/419G11C16/06G11C16/26G11C16/32H03K19/017545
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Quick Facts
Patent No.
US 9,306,564
App. No.
14/695,260
Granted
Apr 5, 2016
Kind
B2
Abstract

In a non-volatile memory device having an array of non-volatile storage elements, control information received via one or more control input nodes indicates, at different times, that (i) data signals representative of data to be stored within the array of non-volatile storage elements are to be received via a plurality of input/output (I/O) nodes of the non-volatile memory device, and (ii) data signals representative of data read from the array of non-volatile storage elements are to be output via the plurality of I/O nodes. First termination elements are switchably coupled to and decoupled from the I/O nodes based at least in part on the control information, and second termination elements are switchably coupled to and decoupled from the one or more control input nodes based at least in part on the control information.

Claims (34)

1. A non-volatile memory device comprising:

an array of non-volatile storage elements;

a plurality of input/output (I/O) nodes to receive data signals representative of data to be stored within the array of non-volatile storage elements and to output data signals representative of data read from the array of non-volatile storage elements;

one or more control input nodes to receive control information indicating that data signals are to be received or output via the I/O nodes during a subsequent time interval; and

on-die termination circuitry to switchably couple and decouple respective termination elements to and from the I/O nodes based at least in part on the control information, and also to switchably couple and decouple respective termination elements to and from the one or more control input nodes.

2. The non-volatile memory device of claim 1 wherein the control information indicating that data signals are to be received or output via the I/O nodes comprises an enable signal and wherein the on-die termination circuitry comprises circuitry to switchably couple and decouple the termination elements to and from the I/O nodes based, at least in part, on the enable signal.

3. The non-volatile memory device of claim 1 wherein the plurality of I/O nodes are to be coupled to external signaling lines that convey, at respective times, the data signals representative of data to be stored within the array of non-volatile storage elements and the data signals representative of data read from the array of non-volatile storage elements, and wherein the plurality of I/O nodes are further to receive address signals that are time-multiplexed, on the external signaling lines, with the data signals representative of data to be stored and the data signals representative of data read from the array.

4. The non-volatile memory device of claim 1 further comprising one or more storage registers to store one or more termination values that indicate resistances to be implemented by the termination elements switchably coupled to the I/O nodes and the termination elements switchably coupled to the one or more control input nodes.

5. The non-volatile memory device of claim 1 wherein the one or more control input nodes comprise input nodes to receive the control information via at least one differential signaling line pair.

6. The non-volatile memory device of claim 1 further comprising a programmable register to store first and second values representative of respective first and second resistance values to be implemented at different times by the termination elements to be coupled to and decoupled from the I/O nodes.

7. The non-volatile memory device of claim 6 wherein each of the termination elements to be coupled to and decoupled from the I/O nodes comprises a first set of load elements to implement the first resistance value and a second set of load elements to implement the second resistance value and circuitry to switchably couple, to a corresponding one of the I/O nodes, either the first set of load elements or the second set of load elements.

8. The non-volatile memory device of claim 1 wherein the one or more control input nodes to receive control information indicating that data signals are to be received or output during a subsequent time interval, comprise one or more input nodes to receive control information indicating that data signals representative of data read from the array of non-volatile storage elements are to be output via the I/O nodes in response to receipt of the control information.

9. The non-volatile memory device of claim 1 wherein the one or more control input nodes to receive control information indicating that data signals are to be received or output during a subsequent time interval comprise one or more input nodes to receive control information indicating that data signals representative of data read from the array of non-volatile storage elements are to be output via the I/O nodes during an ensuing time interval.

10. The non-volatile memory device of claim 1 further comprising a chip-select input to receive a signal that selects the non-volatile memory device as a target for a signaling transaction.

11. The non-volatile memory device of claim 1 wherein the on-die termination circuitry comprises logic circuitry to switchably decouple the termination elements from the I/O nodes during an interval in which signals representative of data read from the array of non-volatile storage elements are output from the non-volatile memory device via the I/O nodes.

12. A method of operation within a non-volatile memory device having an array of non-volatile storage elements, the method comprising:

receiving, via one or more control input nodes, control information indicating at different times that (i) data signals representative of data to be stored within the array of non-volatile storage elements are to be received via a plurality of input/output (I/O) nodes of the non-volatile memory device, and (ii) data signals representative of data read from the array of non-volatile storage elements are to be output via the plurality of I/O nodes;

switchably coupling and decoupling first termination elements to and from the I/O nodes based at least in part on the control information; and

switchably coupling and decoupling one or more second termination elements to the one or more control input nodes.

13. The method of claim 12 wherein the control information indicating that data signals are to be received or output via the I/O nodes comprises an enable signal and wherein switchably coupling and decoupling the first termination elements to and from the I/O nodes based at least in part on the control information comprises switchably coupling and decoupling the termination elements to and from the I/O nodes based at least in part on the enable signal.

14. The method of claim 12 wherein the plurality of I/O nodes are coupled to external signaling lines that convey, at respective times, the data signals representative of data to be stored within the array of non-volatile storage elements and the data signals representative of data read from the array of non-volatile storage elements, the method further comprising receiving, via the plurality of I/O nodes, address signals that are time-multiplexed on the external signaling lines with the data signals representative of data to be stored and the data signals representative of data read.

15. The method of claim 12 further comprising storing, within one or more programmable storage registers of the non-volatile memory device, one or more termination values that indicate resistances to be implemented by the termination elements switchably coupled to the I/O nodes and the termination elements switchably coupled to the one or more control input nodes.

16. The method of claim 12 wherein receiving the control information via the one or more control input nodes comprises receiving the control information via at least one differential signaling line pair.

17. The method of claim 12 further comprising storing, within a programmable storage register of the non-volatile memory device, first and second values representative of respective first and second resistance values to be implemented at different times by the termination elements switchably coupled to and decoupled from the I/O nodes.

18. The method of claim 17 wherein each of the first termination elements comprises a first set of load elements to implement the first resistance value and a second set of load elements to implement the second resistance value and wherein switchably coupling and decoupling the first termination elements to and from the I/O nodes comprises, switchably coupling either the first set of load elements or the second set of load elements to one of the I/O nodes.

19. The method of claim 12 wherein receiving the control information indicating that data signals are to be received or output comprises receiving control information indicating that data signals representative of data read from the array of non-volatile storage elements are to be output via the I/O nodes in response to receipt of the control information.

20. The method of claim 12 wherein receiving the control information indicating that data signals are to be received or output comprises receiving control information indicating that data signals representative of data read from the array of non-volatile storage elements are to be output via the I/O nodes during an ensuing time interval.

21. The method of claim 12 further comprising receiving a signal that selects the non-volatile memory device as a target for a signaling transaction.

22. The method of claim 12 wherein switchably coupling and decoupling first termination elements to and from the I/O nodes based at least in part on the control information comprises switchably decoupling the first termination elements from the I/O nodes during an interval in which signals representative of data read from the array of non-volatile storage elements are output from the non-volatile memory device via the I/O nodes.

23. A non-transitory machine-readable medium that stores data representative of a non-volatile memory device comprising:

an array of non-volatile storage elements;

a plurality of input/output (I/O) nodes to receive data signals representative of data to be stored within the array of non-volatile storage elements and to output data signals representative of data read from the array of non-volatile storage elements;

one or more control input nodes to receive control information indicating that data signals are to be received or output via the I/O nodes during a subsequent time interval; and

on-die termination circuitry to switchably couple and decouple respective termination elements to and from the I/O nodes based at least in part on the control information, and also to switchably couple and decouple respective termination elements to and from the one or more control input nodes.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2025
From: RAMBUS INC.
To: SIGNAL LLP
Reel/Frame 073085/0650 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2015
From: OH, KYUNG SUK; SHAEFFER, IAN P.
To: RAMBUS INC.
Reel/Frame 035529/0257 →
Continuity (10)
Continuation 14523923 · Oct 26, 2014
Continuation 13952393 · Jul 26, 2013
Continuation 13480298 · May 24, 2012
Continuation 13180550 · Jul 12, 2011
Continuation 13043946 · Mar 9, 2011
Continuation 12861771 · Aug 23, 2010
Continuation 12507794 · Jul 22, 2009
Continuation 12199726 · Aug 27, 2008
Continuation 11422022 · Jun 2, 2006
Related Publication 20150229306A1 · Aug 13, 2015