Method for forming interposers and stacked memory devices
View Patent ↗Methods for forming a stacking interposer are provided that create a more compact and/or reliable interposer cavity. According to one method, a segmentation process that partially cuts a multi-cell, multi-layer PCB panel to a controlled depth along the internal walls/edges of a cavity region with each of the interposer cell sites defined within the PCB panel is used. The material within the cavity region is then removed (by routing) to a controlled depth to form the internal cavity for each interposer cell site. Pillars may then be removed from the PCB panel. As a result of the initial partial cuts of the internal walls of the cavity region, the corners of the cavities may have a square configuration for fitting over the top of a BGA/memory device (which has very square corners).
1. A method of manufacturing a ball grid array module, comprising:
depositing solder paste on a primary side of a dual in-line memory module (DIMM) printed circuit board using a surface mount technology solder paste stencil process;
placing a first dynamic random access memory device on the deposited solder paste;
placing a stacking interposer over the first dynamic random access memory device;
dipping solder balls of a second dynamic random access memory device in flux;
placing the dipped solder balls of the second first dynamic random access memory device on a top surface of the stacking interposer; and
performing a single reflow cycle to form solder connections between the second dynamic random access memory device and the interposer, between the interposer and the DIMM printed circuit board, and between the first dynamic random access memory device and the DIMM printed circuit board.
2. The method of claim 1 , wherein the stacking interposer has a cavity formed by inner walls connected at corners having a square configuration.
3. The method of claim 2 , wherein the cavity is configured to receive the first dynamic random access memory device.
4. The method of claim 2 , wherein a gap is formed between the stacking interposer and the first dynamic random access memory device.