Temperature grading for band gap engineering of photovoltaic devices
A photovoltaic device includes a p-type layer. An intrinsic layer is formed directly on the p-type layer and includes an interface region extending into the intrinsic layer that includes a gradually decreasing band gap energy going from the p-type layer into the intrinsic layer formed by a graded deposition temperature. An n-type layer is formed directly on the intrinsic layer.
1. A photovoltaic device, comprising:
a p-type layer;
an intrinsic semiconductor layer formed directly on the p-type layer without the addition of any additives, comprising an interface region extending only part-way into the intrinsic layer, formed directly between two regions of constant band gap energy, that includes a monotonically decreasing band gap energy going from the p-type layer into the intrinsic layer formed by a graded deposition temperature, wherein the graded deposition temperature is graded according to an exponential profile that determines a deposition temperature at every point in the interface region; and
an n-type layer formed directly on the intrinsic layer.
2. The device as recited in claim 1 , wherein the p-type layer, the intrinsic layer and the n-type layer include amorphous silicon or an amorphous compound including silicon.
3. The device as recited in claim 1 , wherein the interface region is formed by grading a deposition temperature from about 200 degrees Celsius to about 250 degrees Celsius.
4. The device as recited in claim 1 , wherein the interface region includes a band gap alignment region between the p-type layer and the intrinsic layer such that band gap energy includes a gradual transition between the p-type layer and the intrinsic layer.
5. The device as recited in claim 4 , wherein the band gap alignment region is free of discontinuous barriers between the p-type layer and the intrinsic layer.
6. The device as recited in claim 1 , further comprising a degradation efficiency that is less than a degradation efficiency provided by including carbon at an interface between the p-type layer and the intrinsic layer.
7. The device as recited in claim 1 , further comprising at least one electrode formed in contact with the p-type layer.
8. A photovoltaic device, comprising:
a p-type layer;
an electrode formed in contact with the p-type layer;
an intrinsic amorphous hydrogenated silicon layer formed directly on the p-type layer without the addition of any additives, comprising an interface region extending only part-way into the intrinsic layer, formed directly between two regions of constant band gap energy, that includes a monotonically decreasing band gap energy going from the p-type layer into the intrinsic layer formed by a graded deposition temperature, wherein the interface region includes a band gap alignment region that is free of discontinuous barriers, such that band gap energy includes a continuous transition between the p-type layer and the intrinsic layer and wherein the graded deposition temperature is graded according to an exponential profile that determines a deposition temperature at every point in the interface region; and
an n-type layer formed directly on the intrinsic layer.
9. The device as recited in claim 8 , wherein the p-type layer, the intrinsic layer and the n-type layer include amorphous silicon or an amorphous compound including silicon.
10. The device as recited in claim 8 , wherein the interface region is formed by grading a deposition temperature from about 200 degrees Celsius to about 250 degrees Celsius.
11. The device as recited in claim 8 , further comprising a degradation efficiency that is less than a degradation efficiency provided by including carbon at an interface between the p-type layer and the intrinsic layer.
12. A photovoltaic device, comprising:
a p-type layer comprising amorphous silicon;
an electrode formed in contact with the p-type layer;
an intrinsic layer comprising amorphous silicon formed directly on the p-type layer, comprising an interface region extending only part-way into the intrinsic layer, formed directly between two regions of constant band gap energy, that includes a monotonically decreasing band gap energy going from the p-type layer into the intrinsic layer formed by a graded deposition temperature with adding additional materials to the amorphous silicon, wherein the interface region includes a band gap alignment region that is free of discontinuous barriers, and wherein the graded deposition temperature is graded according to an exponential profile; and
an n-type layer comprising amorphous silicon formed directly on the intrinsic layer.
13. The device as recited in claim 12 , wherein the interface region is formed by grading a deposition temperature from about 200 degrees Celsius to about 250 degrees Celsius.
14. The device as recited in claim 12 , further comprising a degradation efficiency that is less than a degradation efficiency provided by including carbon at an interface between the p-type layer and the intrinsic layer.