Circuit and method for reducing BVii on highly overdriven devices
An integrated circuit is formed on a p-type semiconductor substrate connected to ground potential. A deep n-well is disposed in the p-type substrate. A p-well is disposed in the deep n-well. An n+ drain region and an n+ source region are disposed in the p-well, the n+ source region connected to a common potential. A p-type contact is disposed in the p-well and is connected to ground potential through a resistor.
1. An integrated circuit comprising:
a p-type semiconductor substrate connected to ground potential;
a deep n-well disposed in the p-type substrate;
a p-well disposed in the deep n-well;
an n+ drain region and an n+ source region disposed in the p-well, the n+ source region connected to a common potential;
a p-type contact disposed in the p-well and arranged to connect the p-well to the common potential through a resistor having a resistance of between about 100 kΩ and about 500 kΩ.
2. The integrated circuit of claim 1 wherein the p-type contact is p- doped to form the resistor.
3. The integrated circuit of claim 1 wherein the resistor has a resistance of about 300 kΩ.
4. The integrated circuit of claim 1 wherein the p-type contact is formed as a long and narrow region to form the resistor.
5. The integrated circuit of claim 4 wherein the resistor has a resistance of between about 100 kΩ and about 500 kΩ.
6. The integrated circuit of claim 5 wherein the resistor has a resistance of about 300 kΩ.
7. The integrated circuit of claim 1 wherein the resistor is a polysilicon resistor.
8. The integrated circuit of claim 7 wherein the resistor has a resistance of between about 100 kΩ and about 500 kΩ.
9. The integrated circuit of claim 8 wherein the resistor has a resistance of about 300 kΩ.
10. The integrated circuit of claim 1 wherein the p-type contact is p- doped and is in series with a polysilicon region to form the resistor.
11. The integrated circuit of claim 10 wherein the resistor has a resistance of between about 100 kΩ and about 500 kΩ.
12. The integrated circuit of claim 11 wherein the resistor has a resistance of about 300 kΩ.