Interposer substrate and method of fabricating the same
The invention provides an interposer substrate and a method of fabricating the same. The method includes: etching a carrier to form a recessed groove thereon; filling a dielectric material in the recessed groove to form a first dielectric material layer, or forming a patterned first dielectric material layer on the carrier; forming a first wiring layer, a first conductive block and a second dielectric material layer on the carrier and the first dielectric material layer sequentially, with the first wiring layer and the first conductive block embedded in the second dielectric material layer; and forming a second wiring layer and a second conductive block on the second dielectric material layer. A coreless interposer substrate having fine pitches is thus fabricated.
1. An interposer substrate, comprising:
a first dielectric material layer having opposing first and second surfaces and a plurality of openings penetrating the first and second surfaces;
a first wiring layer having a first portion formed on the second surface of the first dielectric material layer and a second portion formed in the openings of the first dielectric material layer and exposed from the first surface of the first dielectric material layer;
a plurality of first conductive blocks formed on the first wiring layer;
a second dielectric material layer covering the second surface of the first dielectric material layer and the first wiring layer and encapsulating the first conductive blocks, with terminal portions of the first conductive blocks exposed from the second dielectric material layer, wherein the second dielectric material layer is free from being covered by a solder mask layer;
a second wiring layer formed on and free from being encapsulated by the second dielectric material layer and electrically connected with the first conductive blocks; and
a plurality of second conductive blocks made of copper and formed on the second wiring layer and free from being encapsulated by the second dielectric material layer and the solder mask layer.
2. The interposer substrate of claim 1 , further comprising a frame-type carrier formed on the first surface of the first dielectric material layer.
3. The interposer substrate of claim 1 , wherein the second portion of the first wiring layer that is exposed from the first dielectric material layer serves as bonding pads, for an external electronic component to be disposed on and electrically connected with the bonding pads via a plurality of conductive elements.