IP Library Granted Patent US 9,443,837
Granted Patent B2
US 9,443,837 · App. 14/709,011 · Granted Sep 13, 2016

Z-connection for a microelectronic package using electroless plating

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Quick Facts
Patent No.
US 9,443,837
App. No.
14/709,011
Granted
Sep 13, 2016
Kind
B2
Abstract

An assembly includes a substrate having a substrate conductor and a contact at a first surface and a terminal at a second surface for electrically interconnecting the assembly with a component external to the assembly, at least one of the substrate conductor or the contact electrically coupled with the terminal. A first element has a first surface facing the first surface of the substrate, a first conductor at the first surface and a second conductor at a second surface. An interconnect structure may extend through the first element electrically coupling the first and second conductors. An adhesive layer may bond first surfaces of the first element and the substrate, and at least portions of the first conductor and the substrate conductor may be beyond an edge of the adhesive layer. A continuous electroless plated metal region may extend between the first conductor and the substrate conductor.

Claims (34)

1. A method of forming a substrate assembly, comprising:

assembling a first element and a substrate using an adhesive layer,

wherein the substrate consists essentially of dielectric material, has a first surface, a second surface opposite the first surface, a substrate conductor and a contact at the first surface, and a terminal at the second surface for electrically interconnecting the assembly with a component external to the assembly, at least one of the substrate conductor or the contact being electrically connected with the terminal,

the first element consists essentially of dielectric material, has a first surface facing the first surface of the substrate and a second surface opposite the first surface, a first conductor at the first surface, a second conductor at the second surface, and interconnect structure extending through the first element electrically connecting the first and second conductors, and

the adhesive layer bonding the first surfaces of the first element and the first surface of the substrate with one another, such that at least portions of the first conductor and the substrate conductor are exposed beyond an edge of the adhesive layer; and

connecting the first conductor and substrate conductor by electrolessly plating first and second metal regions onto the first conductor and the substrate conductor such that the first and second plated metal regions merge together during the plating to form a continuous electroless plated metal region extending between the first conductor and the substrate conductor and extending to a height above the first surface of the substrate, wherein the height is less than a height of the second surface of the first element above the first surface of the substrate.

2. The method of claim 1 , wherein the first conductor is one of a plurality of first conductors and wherein the substrate conductor is one of a plurality of substrate conductors,

wherein the step of connecting includes:

connecting each first conductor with a corresponding substrate conductor by a corresponding continuous electroless plated metal region formed during the electroless plating thereon, wherein each substrate conductor is electrically connected to a corresponding first conductor through one of the continuous electroless plated metal regions.

3. The method of claim 2 , wherein the first element is in the form of an element having a framed region surrounding a central aperture, the central aperture sized to accommodate a microelectronic element.

4. The method of claim 3 , wherein the second conductor is one of a plurality of second conductors electrically connected with the first conductors by the interconnect structure, wherein the contact is one of a plurality of contacts, and wherein the method further comprises:

connecting a first microelectronic element with corresponding ones of the plurality of contacts and corresponding ones of the plurality of substrate conductors, at least a portion of the thickness of the first microelectronic element being disposed within the central aperture of the first element; and

connecting a second microelectronic element at the second surface of the first element with corresponding ones of the plurality of second conductors.

5. A method of forming an assembly, comprising:

assembling a first element and a substrate using an adhesive layer,

wherein the substrate consists essentially of semiconductor material, has a first surface, a second surface opposite the first surface, a substrate conductor and a contact at the first surface, and a terminal at the second surface for electrically interconnecting the assembly with a component external to the assembly, at least one of the substrate conductor or the contact being electrically connected with the terminal,

the first element consists essentially of semiconductor material, has a first surface facing the first surface of the substrate and a second surface opposite the first surface, a first conductor at the first surface, a second conductor at the second surface, and a through silicon via extending through the first element electrically connecting the first and second conductors, and

the adhesive layer bonding the first surface of the first element and the first surface of the substrate with one another, such that at least portions of the first conductor and the substrate conductor are exposed beyond an edge of the adhesive layer; and

connecting the first conductor and substrate conductor by electrolessly plating first and second metal regions onto the first conductor and the substrate conductor such that the first and second plated metal regions merge together during the plating to form a continuous electroless plated metal region extending between the first conductor and the substrate conductor and extending to a height above the first surface of the substrate, wherein the height is less than a height of the second surface of the first element above the first surface of the substrate.

6. The method of claim 1 , wherein the connecting comprises electrolessly depositing a first metal region onto the first conductor and electrolessly depositing a second metal region onto the substrate conductor, wherein each of the electrolessly depositing the first and second metal regions including electrolessly depositing a first metal layer and electrolessly depositing a second metal layer covering the first layer.

7. The method of claim 6 , wherein the first and second metal layers are formed by electrolessly depositing one or more materials selected from the group consisting of cobalt (Co), nickel (Ni), copper (Cu), gold (Au), Co alloys, Ni alloys, Cu alloys, or Au alloys.

8. The method of claim 1 , wherein each of the first conductor and the substrate conductor includes a metal at a surface thereof, wherein the electrolessly depositing includes electrolessly depositing a metal different from the metal at the surfaces of the first conductor and the substrate conductor.

9. The method of claim 1 , wherein a minimum distance between the first conductor and the substrate conductor is less than about 20 microns.

10. The method of claim 1 , wherein the first conductor is one of a plurality of first conductors at the first surface of the first element, the substrate conductor is one of a plurality of substrate conductors at the first surface of the substrate, and the electrolessly plating the metal region includes electrolessly plating a plurality of continuous plated metal regions, each continuous electroless plated metal region extending between a first conductor of the plurality of first conductors and a corresponding substrate conductor of the plurality of substrate conductors, wherein the electroless plated metal regions formed on first and second adjacent pairs of one first conductor with one substrate conductor are spaced apart from one another.

11. The method of claim 1 , wherein the adhesive layer is a conductive adhesive layer, the conductive adhesive layer insulated from the first conductor and the substrate conductor.

12. The method of claim 1 , wherein the height that the second surface of the first element extends above the first surface of the substrate is greater than about 200 microns.

13. The method of claim 1 , wherein at least one of the first element or the substrate consists essentially of a single dielectric layer or a plurality of dielectric layers.

14. The method of claim 1 , wherein the adhesive layer is one of a plurality of layers.

15. The method of claim 1 , wherein the adhesive layer is comprised of an electrically insulating material.

16. The method of claim 5 , wherein the connecting comprises electrolessly depositing a first metal region onto the first conductor and electrolessly depositing a second metal region onto the substrate conductor, wherein each of the electrolessly depositing the first and second metal regions including electrolessly depositing a first metal layer and electrolessly depositing a second metal layer covering the first layer.

17. The method of claim 16 , wherein the first and second metal layers are formed by electrolessly depositing one or more materials selected from the group consisting of cobalt (Co), nickel (Ni), copper (Cu), gold (Au), Co alloys, Ni alloys, Cu alloys, or Au alloys.

18. The method of claim 5 , wherein each of the first conductor and the substrate conductor includes a metal at a surface thereof, wherein the electrolessly depositing includes electrolessly depositing a metal different from the metal at the surfaces of the first conductor and the substrate conductor.

19. The method of claim 5 , wherein a minimum distance between the first conductor and the substrate conductor is less than about 20 microns.

20. The method of claim 5 , wherein the first conductor is one of a plurality of first conductors at the first surface of the first element, the substrate conductor is one of a plurality of substrate conductors at the first surface of the substrate, and the electrolessly plating the metal region includes electrolessly plating a plurality of continuous plated metal regions, each continuous electroless plated metal region extending between a first conductor of the plurality of first conductors and a corresponding substrate conductor of the plurality of substrate conductors, wherein the electroless plated metal regions formed on first and second adjacent pairs of one first conductor with one substrate conductor are spaced apart from one another.

Assignments (6)
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS CORPORATION
To: INVENSAS LLC
Reel/Frame 073689/0754 →
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS LLC
To: ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
Reel/Frame 073689/0786 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2015
From: HABA, BELGACEM; UZOH, CYPRIAN EMEKA
To: INVENSAS CORPORATION
Reel/Frame 035640/0410 →