Method and apparatus for providing hardware support for self-modifying code

1. An apparatus comprising:

a memory;

a hardware buffer; and

a processor, including a set of cores, wherein the processor is configured to:

convert guest code to native code;

store converted guest code into a code cache portion of the processor;

maintain the hardware buffer configured for tracking respective locations of converted code in a code cache, wherein the hardware buffer is updated based on a respective access to a respective location in the memory associated with a respective location of converted guest code in the code cache; and

perform a request to modify the respective location in the memory associated with the respective access after accessing the hardware buffer, wherein the processor is configured to raise an exception if the request is to modify a location in memory associated with a location in the code cache that comprises converted guest code and wherein the memory comprises a table associated with the hardware buffer for tracking converted code present in the code cache, including tracking modifications to guest code, a type of exception to take in response to modifications to guest code, and whether the guest code has been converted to native code.

2. The apparatus of claim 1 , wherein the hardware buffer is configured to act as a cache of the table associated with the hardware buffer and the hardware buffer comprises a subset of data of the table associated with the hardware buffer.

3. The apparatus of claim 1 , wherein the processor is configured to raise an exception in response to a guest code branch.

4. The apparatus of claim 1 , wherein the request is a store by self modifying code.

5. The apparatus of claim 1 , wherein the request is a direct memory access (DMA) write.

6. The apparatus of claim 1 , wherein the processor comprises the hardware buffer.

7. A system comprising:

a memory, and;

a processor comprising a hardware buffer, a code cache, and a set of cores, wherein the processor is configured to:

convert guest code to native code;

store converted guest code into a code cache in the processor; and

maintain the hardware buffer configured for tracking respective locations of converted code in a code cache, wherein the hardware buffer is updated based on a respective access to a respective location in the memory associated with a respective location of converted guest code in the code cache; maintain a table associated with the hardware buffer for tracking converted code present in the code cache, wherein the memory comprises the table associated with the hardware buffer; and

perform a request to modify the respective location in the memory associated with the respective access after accessing the hardware buffer, wherein the processor is configured to raise an exception if the request is to modify a location in memory associated with a location in the code cache that comprises converted guest code and wherein the memory comprises a table associated with the hardware buffer for tracking converted code present in the code cache, including tracking modifications to guest code, a type of exception to take in response to modifications to guest code, and whether the guest code has been converted to native code.

8. The system of claim 7 , wherein the hardware buffer is configured to act as a cache of the table associated with the hardware buffer and the hardware buffer comprises a subset of data of the table associated with the hardware buffer.

9. The apparatus of claim 7 , wherein the processor is configured to raise an exception in response to a guest code branch.

10. The apparatus of claim 7 , wherein the request is a store by self modifying code.

11. The apparatus of claim 7 , wherein the request is a direct memory access (DMA) write.

12. A system for converting guest code, the system comprising:

a memory, and;

a processor comprising a hardware buffer, a code cache, and a set of cores, wherein the processor is configured to:

convert guest code to native code;

store converted guest code into a code cache in the processor; and

maintain the hardware buffer configured for tracking respective locations of converted code in a code cache, wherein the hardware buffer is updated based on a respective access to a respective location in the memory associated with a respective location of converted guest code in the code cache, and wherein the hardware buffer is updated in response to self modifying code;

maintain a table associated with the hardware buffer for tracking converted code present in the code cache, wherein the memory comprises the table associated with the hardware buffer; and

perform a request to modify the respective location in the memory associated with the respective access after accessing the hardware buffer wherein the processor is configured to raise an exception if the request is to modify a location in memory associated with a location in the code cache that comprises converted guest code and wherein the memory comprises a table associated with the hardware buffer for tracking converted code present in the code cache, including tracking modifications to guest code, a type of exception to take in response to modifications to guest code, and whether the guest code has been converted to native code.

13. The system of claim 12 , wherein the hardware buffer is configured to act as a cache of the table associated with the hardware buffer and the hardware buffer comprises a subset of data of the table associated with the hardware buffer.

14. The system of claim 12 , wherein the processor is configured to raise an exception in response to a guest code branch.

15. The system of claim 12 , wherein the request is a store.

16. The system of claim 12 , wherein the request is a direct memory access (DMA) write.