Transistor structure with feed-through source-to-substrate contact
View Patent ↗An LDMOS (laterally diffused metal oxide semiconductor) structure connects the source to a substrate and also the gate shield while utilizing a reduced area for such contacts. The structure includes an electrically conductive substrate layer, a source, and a drain contact; the drain contact is separated from the substrate layer by at least one intervening layer. An electrically conductive trench-like feed-through element passes through the intervening layer and contacts the substrate and the source to electrically connect the drain contact and the substrate layer.
1. A semiconductor device comprising:
an epitaxial layer grown over a heavily doped substrate layer, both of a first conductivity type;
a source region, of a second conductivity type, in said epitaxial layer;
a drain region, of said second conductivity type, in said epitaxial layer;
a drain contact to said drain region, wherein said epitaxial and substrate layers are isolated from said drain contact by a reversed-bias junction and a MOSFET (metal oxide semiconductor field effect transistor) channel;
an electrically conductive trench-like feed-through element that is filled with metal and passes through said epitaxial layer and contacts said substrate layer and said source region;
a gate shield that contacts to said feed-through element and is over said source region, wherein an upper portion of said feed-through element is wider than a lower portion of said feed-through element, thus forming a ledge where said upper portion and said lower portion meet, wherein said gate shield contacts said feed-through element at said ledge; and
an oxide layer over the surface of said metal in said feed-through element and a doped glass layer over said oxide layer.
2. The semiconductor device of claim 1 wherein said gate shield also contacts to said source region.
3. The semiconductor device of claim 1 wherein said gate shield comprises polysilicon.
4. The semiconductor device of claim 1 wherein said metal comprises tungsten.
5. The semiconductor device of claim 1 wherein said device comprises a flip chip.
6. The semiconductor device of claim 1 wherein said device comprises a laterally diffused metal oxide semiconductor (LDMOS) device.
7. The semiconductor device of claim 1 wherein said feed-through element comprises a conformal coating that forms a barrier layer.
8. The semiconductor device of claim 7 wherein said conformal coating comprises titanium nitride.
9. A semiconductor device comprising:
a epitaxial layer grown over a heavily doped substrate layer, both of a first conductivity type;
a source region, of a second conductivity type, in said epitaxial layer;
a drain region, of said second conductivity type, in said epitaxial layer;
a drain contact coupled to a metal layer, wherein said epitaxial and substrate layers are isolated from said drain contact by a reversed-bias junction and a MOSFET (metal oxide semiconductor field effect transistor) channel;
an electrically conductive trench-like feed-through element that is filled with metal and passes through said epitaxial layer and contacts said substrate layer, wherein said feed-through element is separated from said metal layer by at least one intervening layer, and wherein said drain contact and said feed-through element are separated by said epitaxial layer;
a gate structure, wherein application of an electrical potential to said gate structure forms an electrical path that includes said substrate layer, said drain contact, said epitaxial layer, and said feed-through element;
a gate shield that contacts to said feed-through element and is over said source region, wherein an upper portion of said feed-through element is wider than a lower portion of said feed-through element, thus forming a ledge where said upper portion and said lower portion meet, wherein said gate shield contacts said feed-through element at said ledge; and
an oxide layer over the surface of said metal in said feed-through element and a doped glass layer over said oxide layer.
10. The semiconductor device of claim 9 wherein said gate shield also contacts to said source region.
11. The semiconductor device of claim 9 wherein said gate shield comprises polysilicon and wherein said feed-through element comprises tungsten.
12. The semiconductor device of claim 9 wherein said feed-through element comprises a conformal coating that forms a barrier layer.
13. The semiconductor device of claim 9 wherein said device comprises a flip chip.
14. The semiconductor device of claim 9 wherein said device comprises a laterally diffused metal oxide semiconductor (LDMOS) device.