Sub-blocks and meta pages for mapping table rebuild
Data associated with logical addresses are received where the data is to be stored on a plurality of solid state storage dies and each of the plurality of solid state storage dies is independently accessible. Metadata is generated that includes the logical addresses where the metadata and the data sum to an amount of information that is less than a maximum amount of information that can be written to the plurality of solid state storage dies in a single write operation. The metadata and the data are stored in the plurality of solid state storage dies.
1. A system, comprising:
a storage controller configured to:
receive a plurality of data associated with a plurality of logical addresses, wherein: (1) the plurality of data is to be stored on a plurality of solid state storage dies and (2) each of the plurality of solid state storage dies is independently accessible and comprises a plurality of planes;
generate metadata that includes the plurality of logical addresses, wherein the metadata and the plurality of data sum to a super-block, wherein the super-block stores an amount of information that is less than a maximum amount of information that can be written to the plurality of solid state storage dies in a single write operation, the super-block comprises a plurality of sub-blocks; and
store the metadata and the plurality of data in a proper order, wherein the metadata and the plurality of data arranged in the proper order are written to the plurality of solid state storage dies, metadata of a sub-block is stored in a subsequent sub-block of the super-block and wrapping around to the first solid state storage die when the metadata of the sub-block reaches the last solid state storage die of the super block, and all of the metadata arranged in the proper order are read simultaneously in a single read operation.
2. The system of claim 1 , wherein the storage controller includes a semiconductor device, including one or more of the following: an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA).
3. The system of claim 1 , wherein the super-block comprises same planes of each of the plurality of solid state storage dies, wherein the same planes of each of the plurality of solid state storage dies have same index numbers.
4. The system of claim 1 , wherein the storage controller is configured to store the metadata in a same position within a sub-block.
5. The system of claim 1 , wherein the storage controller is configured to store the metadata in a next sub-block.
6. The system of claim 1 , wherein the proper order includes a striped pattern.
7. A method, comprising:
receiving a plurality of data associated with a plurality of logical addresses, wherein: (1) the plurality of data is to be stored on a plurality of solid state storage dies and (2) each of the plurality of solid state storage dies is independently accessible and comprises a plurality of planes;
generating metadata that includes the plurality of logical addresses, wherein the metadata and the plurality of data sum to a super-block, wherein the super-block stores an amount of information that is less than a maximum amount of information that can be written to the plurality of solid state storage dies in a single write operation, the super-block comprises a plurality of sub-blocks; and
storing the metadata and the plurality of data in a proper order, wherein the metadata and the plurality of data arranged in the proper order are written to the plurality of solid state storage dies, the storing the metadata in the proper order includes storing metadata of a sub-block in a subsequent sub-block of the super-block and wrapping around to the first solid state storage die when the metadata of the sub-block reaches the last solid state storage die of the super block, and all of the metadata arranged in the proper order are read simultaneously in a single read operation.
8. The method of claim 7 , wherein the method is performed by a semiconductor device, including one or more of the following: an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA).
9. The method of claim 7 , wherein the super-block comprises same planes of each of the plurality of solid state storage dies, wherein the same planes of each of the plurality of solid state storage dies have same index numbers.
10. The method of claim 7 , wherein storing the metadata includes storing the metadata in a same position within a sub-block.
11. The method of claim 7 , wherein storing the metadata includes storing the metadata in a next sub-block.
12. The method of claim 7 , wherein storing the metadata in the proper order includes storing the metadata using a striped pattern.
13. A non-transitory computer program product comprising:
a processor; and
a tangible computer readable storage medium coupled to the processor, embedding the non-transitory computer program product executed by the processor, including computer instructions suitable for:
receiving a plurality of data associated with a plurality of logical addresses, wherein: (1) the plurality of data is to be stored on a plurality of solid state storage dies and (2) each of the plurality of solid state storage dies is independently accessible and comprises a plurality of planes;
generating metadata that includes the plurality of logical addresses, wherein the metadata and the plurality of data sum to a super-block, wherein the super-block stores an amount of information that is less than a maximum amount of information that can be written to the plurality of solid state storage dies in a single write operation, the super-block comprises a plurality of sub-blocks; and
storing the metadata and the plurality of data in a proper order, wherein the metadata and the plurality of data arranged in the proper order are written to the plurality of solid state storage dies, the storing the metadata in the proper order includes storing metadata of a sub-block in a subsequent sub-block of the super-block and wrapping around to the first solid state storage die when the metadata of the sub-block reaches the last solid state storage die of the super block, and all of the metadata arranged in the proper order are read simultaneously in a single read operation.
14. The computer program product of claim 13 , wherein the super-block comprises same planes of each of the plurality of solid state storage dies wherein the same planes of each of the plurality of solid state storage dies have same index numbers.
15. The computer program product of claim 13 , wherein the computer instructions for storing the metadata include computer instructions for storing the metadata in a same position within a sub-block.
16. The computer program product of claim 13 , wherein the computer instructions for storing the metadata include computer instructions for storing the metadata in a next sub-block.
17. The computer program product of claim 13 , wherein the computer instructions for storing the metadata in the proper order include computer instructions for storing the metadata using a striped pattern.