Patent Assignment
Reel/Frame 044899/0443
Assignment of Assignor's Interest
Recorded: 2017-12-15
Pages: 9
Assignor
SK HYNIX MEMORY SOLUTIONS INC.
Executed: 2017-12-14
Assignee
SK HYNIX INC.
2091, GYEONGCHUNG-DAERO, BUBAL-EUB, ICHEON-SI, GYEONGGI-DO, KOREA, REPUBLIC OF
Covered Properties
(93)
Selective Copy-Back
Patent:
9,378,097 →
Application:
14/249,271 →
Workload-Based Adjustable Cache Size
Patent:
9,734,066 →
Application:
14/632,725 →
Deduplication Using a Master and a Slave
Distributed Deduplication Storage System with Messaging
Patent:
10,073,878 →
Application:
14/694,644 →
Sub-Blocks and Meta Pages for Mapping Table Rebuild
Patent:
9,823,863 →
Application:
14/714,017 →
Stopping Rules for Turbo Product Codes
Patent:
9,559,727 →
Application:
14/720,566 →
True Random Number Generator
Patent:
9,531,354 →
Application:
14/745,275 →
Prefetch with Localities and Performance Monitoring
Patent:
9,529,722 →
Application:
14/795,634 →
Maintaining Wear Spread by Dynamically Adjusting Wear-Leveling Frequency
Patent:
9,710,176 →
Application:
14/817,113 →
Accelerated Data Copyback
Patent:
10,353,775 →
Application:
14/817,117 →
Data Separation During Garbage Collection and Wear Leveling
Patent:
10,725,668 →
Application:
14/817,118 →
Data Separation During Host Write with Storage Allocated Based on Traffic Profiles
Patent:
9,959,060 →
Application:
14/825,537 →
Look-Ahead Garbage Collection for Nand Flash Based Storage
Patent:
9,652,382 →
Application:
14/829,524 →
Efficient Buffer Allocation for Nand Write-Path System
Patent:
10,114,742 →
Application:
14/839,831 →
Delay Locked Loop (Dll) Locked to a Programmable Phase
Patent:
9,602,111 →
Application:
14/841,267 →
Sizing a Cache While Taking into Account a Total Bytes Written Requirement
Techniques for Selecting Amounts of Over-Provisioning
Host Traffic Separation Scheme for Sudden Power Loss Scenario
Patent:
9,934,156 →
Application:
14/860,153 →
Discard Command Support in Parity Based Redundant Array of Flash Memory Disk
Patent:
9,891,826 →
Application:
14/864,257 →
Lba Blocking Table for Ssd Controller
Low Power Bias Scheme for Mobile Storage Soc
Fully Scalable Command Execution Unit
Patent:
9,804,782 →
Application:
14/880,013 →
Hierarchical Host Controller for Ssd Device
Patent:
9,804,783 →
Application:
14/881,052 →
Calibration Device and Memory System Having the Same
Memory System and Memory Management Method Thereof
Read-Threshold Calibration in a Solid State Storage System
Optimal Read Threshold Estimation
Hot-Cold Data Separation Method in Flash Translation Layer
Apparatus and Method for Turbo Product Codes
Storage Node Based on Pci Express Interface
Memory System and the Operation Method Thereof
Application:
14/964,168 →
Publication:
US 2016/0179401
Driver Structure for Chip-to-Chip Communications
Reliability-Assisted Bit-Flipping Decoding Algorithm
Methods of System Optimization by Over-Sampling Read
Methods of System Optimization by Over-Sampling Read
Data Integrity and Loss Resistance in High Performance and High Capacity Storage Deduplication
Method and System for Endurance Enhancing, Deferred Deduplication with Hardware-Hash-Enabled Storage Device
Embedded System and Method Thereof
Scheme to Avoid Miscorrection for Turbo Product Codes
Efficient Mapping Scheme with Deterministic Power Transition Times for Flash Storage Devices
Encoder and Decoder Design for Near-Balanced Codes
Memory Controller and Operating Method Thereof
Incremental Llr Generation for Flash Memories
System Optimization in Flash Memories
Scalable Spor Algorithm for Flash Memories
Memory System and Operating Method Thereof
Memory System and Operating Method Thereof
Memory System and Operating Method for Improving Rebuild Efficiency
Controller Adaptation to Memory Program Suspend-Resume
Temperature Sensing Apparatus
Data Separation by Delaying Hot Block Garbage Collection
Reduction of Maximum Latency Using Dynamic Self-Tuning for Redundant Array of Independent Disks
Apparatus for Correcting Gain Error of Analog-to-Digital Converter
Adaptive Read Disturb Reclaim Policy
Miscorrection Avoidance for Turbo Product Codes
Performance Optimization in Soft Decoding for Turbo Product Codes
Generalized Product Codes for Flash Storage
Hybrid Read Disturb Count Management
One-Shot Decoder for Two-Error-Correcting Bch Codes
Modeling Method of Threshold Voltage Distributions
Efficient Encoder Based on Modified Ru Algorithm
Enhanced Chip-Kill Schemes by Using Sub-Trunk Crc
Enhanced Chip-Kill Schemes by Using Ecc Syndrome Pattern
Read Disturb Reclaim Policy
Start-Up Circuit for Bandgap Reference
Peripheral Component Interconnect Express Card
Data Temperature Profiling by Smart Counter
Programmable Protocol Independent Bar Memory for Ssd Controller
High Performance Host Queue Monitor for Pcie Ssd Controller
Delaying Hot Block Garbage Collection with Adaptation
Vss Ldpc Decoder with Improved Throughput for Hard Decoding
Semiconductor Memory System and Operating Method Thereof
Cyclically Interleaved Xor Array for Error Recovery
Bit-Flipping Ldpc Decoding Algorithm with Hard Channel Information
Media Quality Aware Ecc Decoding Method Selection to Reduce Data Access Latency
Data Mapping Scheme for Generalized Product Codes
Throttling for a Memory System Using a Gc/Host Ratio and Operating Method Thereof
Efficient Digital Duty Cycle Adjusters
Memory System Having Multiple Cache Pages and Operating Method Thereof
Self-Management Memory System and Operating Method Thereof
Memory System Having Optimal Threshold Voltage and Operating Method Thereof
System of Multiple Configurations and Operating Method Thereof
Memory System and Method for Accelerating Boot Time
Automated Testing System and Operating Method Thereof
Memory System of Optimal Read Reference Voltage and Operating Method thereof
Memory System with Read Threshold Estimation and Operating Method Thereof
Page Health Prediction Using Product Codes Decoder in Nand Flash Storage
Memory System Having Feature Boosting and Operating Method Thereof
Patent:
10,163,515 →
Application:
15/714,566 →
Memory System Decoding Design and Operating Method Thereof
Memory System with on-the-Fly Error Detection and Termination and Operating Method Thereof
Memory System with File Level Secure Erase and Operating Method Thereof
Memory System of 3D Nand Flash and Operating Method Thereof
Memory System with Ldpc Decoder and Operating Method Thereof
Related Assignments
(21)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Jun 17, 2014
From: BELLORADO, JASON; MARROW, MARCUS
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 033123/0084 →
Assignment of Assignor's Interest
Apr 23, 2015
From: INDUPURU, SUNEEL KUMAR; WU, ZHENG; SUBRAMANIAN, ARUNKUMAR; BELLORADO, JASON
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 035484/0944 →
Assignment of Assignor's Interest
Jun 16, 2015
From: HARIJONO, INDRA G.; CHAI, ZHENCHUAN
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 035847/0536 →
Assignment of Assignor's Interest
Jul 15, 2015
From: HAN, HWANSOO; CHAI, ZHENCHUAN; UM, TAE IL
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 036101/0198 →
Assignment of Assignor's Interest
Jul 28, 2015
From: LU, HONG; SARMICANIC, NAHIR; INDUPURU, SUNEEL KUMAR
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 036192/0800 →
Assignment of Assignor's Interest
Jul 28, 2015
From: KUMAR, NAVEEN; WU, ZHENG; BELLORADO, JASON
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 036192/0822 →
Assignment of Assignor's Interest
Aug 7, 2015
From: SIM, YUKEUN
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 036276/0733 →
Assignment of Assignor's Interest
Oct 19, 2015
From: TANG, XIANGYU; BELLORADO, JASON; ZENG, LINGQI; WU, ZHENG
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 036821/0377 →
Assignment of Assignor's Interest
Dec 29, 2016
From: SHEN, CHUN-JU; CHERN, JENN-GANG
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 040804/0892 →
Assignment of Assignor's Interest
Jun 13, 2017
From: TANG, XIANGYU; ZENG, LINGQI; WU, ZHENG
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 042688/0287 →
Assignment of Assignor's Interest
Sep 27, 2017
From: BAO, SHENGKUN; NAGARAJAN, ANANTHANARAYANAN
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 043717/0758 →
Assignment of Assignor's Interest
Sep 28, 2017
From: CHERN, JENN-GANG; CHEN, MAO-TER
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 043730/0130 →
Assignment of Assignor's Interest
Sep 29, 2017
From: BAO, SHENGKUN; NAGARAJAN, ANANTHANARAYANAN
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 043742/0850 →
Assignment of Assignor's Interest
Jan 2, 2018
From: UM, TAE IL; HAN, HWANSOO; RAHMATIAN, MEHRYAR
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 044513/0555 →
Assignment of Assignor's Interest
Jan 31, 2018
From: LU, HONG; LUO, GONG
To: SK HYNIX INC.
Reel/Frame 044781/0161 →
Assignment of Assignor's Interest
Feb 8, 2018
From: ZHANG, FAN; HO, CHUN HOK; ZHANG, YAN
To: SK HYNIX INC.
Reel/Frame 044872/0018 →
Assignment of Assignor's Interest
Mar 23, 2018
From: TANG, XIANGYU; ZENG, LINGQI
To: SK HYNIX INC.
Reel/Frame 045328/0820 →
Assignment of Assignor's Interest
Jun 26, 2018
From: ZHANG, YAN; ZHANG, FAN
To: SK HYNIX INC.
Reel/Frame 046205/0768 →
Assignment of Assignor's Interest
Oct 9, 2018
From: TANG, XIANGYU; LEE, FREDERICK K. H.
To: SK HYNIX INC.
Reel/Frame 047207/0839 →
Corrective Assignment to Correct the Conveying Party Previously Recorded at Reel: 044781 Frame: 0161. Assignor(S) Hereby Confirms the Assignment.
Oct 23, 2018
From: LU, HONG; LUO, GONG
To: SK HYNIX INC.
Reel/Frame 047292/0238 →
Assignment of Assignor's Interest
Jun 12, 2020
From: TANG, XIANGYU; ZENG, LINGQI
To: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
Reel/Frame 052928/0891 →