IP Library Granted Patent US 10,108,472
Granted Patent B2
US 10,108,472 · App. 15/154,767 · Granted Oct 23, 2018

Adaptive read disturb reclaim policy

Inventors: Yu Cai (San Jose, CA); Fan Zhang (Fremont, CA); June Lee (Sunnyvale, CA); Haibo Li (Sunnyvale, CA)
Assignee: SK Hynix Inc.
G06F11/076G06F11/0727G11C16/3427G11C29/52G11C29/42G11C29/44G11C2029/0411
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Quick Facts
Patent No.
US 10,108,472
App. No.
15/154,767
Granted
Oct 23, 2018
Kind
B2
Abstract

Memory systems may include a memory including a plurality of memory blocks, and a controller suitable for, incrementing a first counter corresponding to a block of the plurality of blocks when the block is read, incrementing a second counter when the first counter reaches a predefined count number, determining an error count of the block when the second counter is incremented, and initiating a reclaim function when the error count exceeds an error threshold.

Claims (33)

1. A memory system, comprising:

a memory including a plurality of memory blocks; and

a controller suitable for:

incrementing a first counter corresponding to a block of the plurality of blocks when the block is read;

incrementing a second counter when the first counter reaches a predefined count number;

determining an error count of the block when the second counter is incremented; and

initiating a reclaim function when the error count exceeds an error threshold, wherein the reclaiming function reclaims valid data in the block when an average error increase per period is larger than a calculated number of errors that the memory system can tolerate.

2. The memory system of claim 1 , wherein the error threshold is based on a difference between an error correction code (ECC) correction capability of the memory system and a total number of errors accumulated in the block.

3. The memory system of claim 1 , wherein the controller is further suitable for calculating a number of errors the memory system can tolerate when the error count does not exceed the error threshold.

4. The memory system of claim 1 , wherein the controller is further suitable for selecting a neighbor wordline to read when the first counter reaches the predefined count number.

5. The memory system of claim 1 , wherein the predefined count number is set to about 10,000 reads.

6. A method, comprising:

incrementing a first counter corresponding to a block of a plurality of blocks of a memory when the block is read;

incrementing a second counter when the first counter reaches a predefined count number;

determining an error count of the block when the second counter is incremented; and

initiating a reclaim function when the error count exceeds an error threshold, wherein the reclaiming function reclaims valid data in the block when an average error increase per period is larger than a calculated number of errors that the memory system can tolerate.

7. The method of claim 6 , wherein the error threshold is based on a difference between an error correction code (ECC) correction capability of the memory system and a total number of errors accumulated in the block.

8. The method of claim 6 , further comprising calculating a number of errors the memory system can tolerate when the error count does not exceed the error threshold.

9. The method of claim 6 , further comprising selecting a neighbor wordline to read when the first counter reaches the predefined count number.

10. The method of claim 6 , wherein the predefined count number is set to about 10,000 reads.

11. A memory device, comprising:

a memory including a plurality of memory blocks;

a first counter;

a second counter; and

a controller configured to:

increment the first counter corresponding to a block of the plurality of blocks when the block is read;

increment the second counter when the first counter reaches a predefined count number;

determine an error count of the block when the second counter is incremented; and

initiate a reclaim function when the error count exceeds an error threshold, wherein the reclaiming function reclaims valid data in the block when an average error increase per period is larger than a calculated number of errors that the memory system can tolerate.

12. The memory device of claim 11 , wherein the error threshold is based on a difference between an error correction code (ECC) correction capability of the memory system and a total number of errors accumulated in the block.

13. The memory device of claim 11 , wherein the controller is further configured to calculate a number of errors the memory system can tolerate when the error count does not exceed the error threshold.

14. The memory device of claim 11 , wherein the controller is further configured to select a neighbor wordline to read when the first counter reaches the predefined count number.

15. The memory device of claim 11 , wherein the predefined count number is set to about 10,000 reads.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2018
From: CAI, YU; ZHANG, FAN
To: SK HYNIX INC.
Reel/Frame 046892/0382 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2017
From: SK HYNIX MEMORY SOLUTIONS INC.
To: SK HYNIX INC.
Reel/Frame 044899/0443 →
Continuity (2)
Provisional Application 62161094 · May 13, 2015
Related Publication 20160335144A1 · Nov 17, 2016