Peripheral component interconnect express card
A peripheral component interconnect express (PCIe) card may include a base card, a mezzanine card and mezz connectors. The base card may be coupled to a host device, and host a first group of solid state drives (SSDs). The mezzanine card may be stacked over the base card, and host a second group of SSDs. The mezz connectors may couple the base card with the mezzanine card, each of the mezz connectors corresponding to each of the second group of SSDs. The base card may include an edge connector suitable for coupling with the host device, a PCIe switch suitable for coupling the first and second groups of SSDs with the host device through the edge connector, and a first group of connectors suitable for coupling the first group of SSDs with the PCIe switch. The mezzanine card may include a second group of connectors suitable for coupling the second group of SSDs.
1. A peripheral component interconnect express (PCIe) card comprising:
a base card suitable for being coupled to a host device, and hosting a first group of solid state drives (SSDs);
a mezzanine card suitable for being stacked over the base card, and hosting a second group of SSDs; and
mezz connectors suitable for coupling the base card with the mezzanine card, each of the mezz connectors corresponding to a respective one SSD of the second group of SSDs,
wherein the base card includes:
an edge connector suitable for coupling with the host device;
a PCIe switch suitable for coupling the first and second groups of SSDs with the host device through the edge connector; and
a first group of connectors suitable for coupling the first group of SSDs with the PCIe switch,
wherein the mezzanine card includes:
a second group of connectors suitable for coupling the second group of SSDs with the PCIe switch.
2. The PCIe card of claim 1 , wherein each of the mezz connectors includes:
a receptacle disposed in the base card; and
a plug disposed in the mezzanine card.
3. The PCIe card of claim 1 , wherein each of the first and second group of SSDs includes two SSDs.
4. The PCIe card of claim 1 , wherein each of the first group of connectors couples a respective SSD of the first group of SSDs with the PCIe switch, and each of the second group of connectors couples a respective SSD of the second group of SSDs with the PCIe switch.
5. The PCIe card of claim 1 , wherein the PCIe switch includes single gen3×8or dual ×4 uplink ports.
6. The PCIe card of claim 1 , further comprising a heat sink disposed in the base card.
7. The PCIe card of claim 1 , wherein the PCIe switch includes a buffer suitable for receiving a reference clock from the host device through the edge connector and distributing the reference clock to each of the first and second group of SSDs.
8. The PCIe card of claim 1 , wherein the PCIe switch includes a buffer suitable for receiving signals from the first and second group of SSDs, combining the signals and providing the single combined signal to the host device through the edge connector.
9. A peripheral component interconnect express (PCIe) card comprising:
a base card suitable for being coupled to a host device, and hosting a first group of solid state drives (SSDs);
a mezzanine card suitable for being stacked over the base card, and hosting a second group of SSDs; and
mezz connectors suitable for coupling the base card with the mezzanine card, each of the mezz connectors corresponding to a respective SSD of the second group of SSDs,
wherein the base card includes:
an edge connector suitable for coupling with the host device;
a PCIe switch suitable for coupling the first and second groups of SSDs with the host device through the edge connector; and
a first group of connectors suitable for coupling the first group of SSDs with the PCIe switch,
wherein the mezzanine card includes:
a second group of connectors suitable for coupling the second group of SSDs with the PCIe switch,
wherein the first and second group of SSDs are arranged in a mirroring structure and the second group of SSDs stores the same data to be stored in the first group of SSDs as backup data.
10. A data processing system comprising:
a host device; and
a peripheral component interconnect express (PCIe) card suitable for being coupled to the host device,
wherein the PCIe card includes:
a base card suitable for being coupled to the host device, and hosting a first group of solid state drives (SSDs);
a mezzanine card suitable for being stacked over the base card, and hosting a second group of SSDs; and
mezz connectors suitable for coupling the base card with the mezzanine card, each of the mezz connectors corresponding to a respective SSD of the second group of SSDs,
wherein the base card includes:
an edge connector suitable for coupling with the host device;
a PCIe switch suitable for coupling the first and second groups of SSDs with the host device through the edge connector; and
a first group of connectors suitable for coupling the first group of SSDs with the PCIe switch,
wherein the mezzanine card includes:
a second group of connectors suitable for coupling the second group of SSDs with the PCIe switch.
11. The data processing system of claim 10 , wherein the host device includes a peripheral component interconnect express (PCIe) slot suitable for coupling with the edge connector of the PCIe card.
12. The data processing system of claim 10 , wherein each of the mezz connectors includes:
a receptacle disposed in the base card; and
a plug disposed in the mezzanine card.
13. The data processing system of claim 10 , wherein each of the first and second group of SSDs includes two SSDs.
14. The data processing system of claim 10 , wherein each of the first group of connectors couples a respective SSD of the first group of SSDs with the PCIe switch, and each of the second group of connectors couples a respective SSD of the second group of SSDs with the PCIe switch.
15. The data processing system of claim 10 , wherein the PCIe switch includes single gen3 ×8 or dual ×4 uplink ports.
16. The data processing system of claim 10 , further comprising a heat sink disposed in the base card.
17. The data processing system of claim 10 , wherein the PCIe switch includes a buffer suitable for receiving a reference clock from the host device through the edge connector and distributing the reference clock to each of the first and second group of SSDs.
18. The data processing system of claim 10 , wherein the PCIe switch includes a buffer suitable for receiving signals from the first and second group of SSDs, combining the signals and providing the single combined signal to the host device through the edge connector.