IP Library Granted Patent US 10,157,952
Granted Patent B2
US 10,157,952 · App. 14/714,293 · Granted Dec 18, 2018

Imaging device including semiconductor substrate and unit pixel cell

Inventors: Tokuhiko Tamaki (Osaka, JP); Junji Hirase (Osaka, JP); Shigeo Yoshii (Osaka, JP)
Assignee: Panasonic Intellectual Property Management Co., Ltd.
H01L27/14636H01L27/14609H01L27/14623H01L27/14632H01L27/14643
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Quick Facts
Patent No.
US 10,157,952
App. No.
14/714,293
Granted
Dec 18, 2018
Kind
B2
Abstract

An imaging device includes a semiconductor substrate and at least one unit pixel cell provided to a surface of the semiconductor substrate. Each of the at least one unit pixel cell includes: a photoelectric converter including a pixel electrode and a photoelectric conversion layer located on the pixel electrode, the photoelectric converter converting incident light into electric charges; a charge detection transistor that includes a part of the semiconductor substrate and detects the electric charges; and a reset transistor that includes a gate electrode and initializes a voltage of the photoelectric converter. The pixel electrode is located above the charge detection transistor. The reset transistor is located between the charge detection transistor and the pixel electrode. When viewed from a direction normal to the surface of the semiconductor substrate, at least a part of the gate electrode is located outside the pixel electrode.

Claims (29)

1. An imaging device comprising:

a semiconductor substrate; and

at least one unit pixel cell provided to a surface of the semiconductor substrate, each of the at least one unit pixel cell including:

a photoelectric converter that includes a pixel electrode and a photoelectric conversion layer located on the pixel electrode, the photoelectric converter converting incident light into electric charges;

a charge detection transistor that includes a part of the semiconductor substrate and detects the electric charges; and

a reset transistor that includes a gate electrode and initializes a voltage of the photoelectric converter, wherein

the pixel electrode, the reset transistor, and the charge detection transistor are arranged in that order toward the semiconductor substrate from the pixel electrode in cross sectional view, the reset transistor is included in one of the at least one unit pixel cell, and when viewed from the direction normal to the surface of the semiconductor substrate, at least a part of the gate electrode of the reset transistor is not covered by the pixel electrode of the photoelectric convertor included in the one of the at least one unit pixel cell,

a first unit pixel cell and a second unit pixel cell are directly adjacent to each other, and

when viewed from the direction normal to the surface of the semiconductor substrate, at least a part of the gate electrode included in the first unit pixel cell overlaps the pixel electrode included in the second unit pixel cell.

2. The imaging device according to claim 1 , wherein

the part of the semiconductor substrate comprises a first semiconductor,

the reset transistor includes at least a part of a semiconductor layer, the at least a part of the semiconductor layer comprising a second semiconductor, and

a band gap of the second semiconductor is larger than a band gap of the first semiconductor.

3. The imaging device according to claim 1 , wherein

the reset transistor includes a source electrode and a drain electrode, and

the charge detection transistor is connected to the pixel electrode and one of the source electrode and the drain electrode.

4. The imaging device according to claim 1 , wherein

a first unit pixel cell and a second unit pixel cell are directly adjacent to each other, and

when viewed from the direction normal to the surface of the semiconductor substrate, at least a part of the gate electrode included in the first unit pixel cell is closer to the pixel electrode included in the second unit pixel cell than the pixel electrode included in the first unit pixel cell.

5. The imaging device according to claim 1 , wherein

each of the at least one unit pixel cell further includes a light shielding film having a light shielding property, and

when viewed from the direction normal to the surface of the semiconductor substrate, the light shielding film is located in a position continuous with the pixel electrode, at least a part of the gate electrode overlapping the light shielding film.

6. The imaging device according to claim 1 , wherein

the reset transistor includes at least a part of a semiconductor layer,

the photoelectric converter is located above the surface of the semiconductor substrate through a multilayer interconnection structure, the multilayer interconnection structure including a first interconnection layer and a second interconnection layer, the first interconnection layer being closer to the semiconductor substrate than the second interconnection layer is, and

the semiconductor layer is located above the first interconnection layer.

7. The imaging device according to claim 6 , wherein the upper interconnection layer is an uppermost layer of the multilayer interconnection structure.

8. The imaging device according to claim 1 , wherein the gate electrode of the reset transistor is closer to the pixel electrode than the semiconductor substrate.

9. The imaging device according to claim 1 , wherein the gate electrode of the reset transistor directly faces the pixel electrode through an insulating layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2015
From: TAMAKI, TOKUHIKO; HIRASE, JUNJI; YOSHII, SHIGEO
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 035726/0916 →
Priority Claims (2)
JP 2014-107506 · May 23, 2014 · national
JP 2014-253391 · Dec 15, 2014 · national
Continuity (1)
Related Publication 20150340393A1 · Nov 26, 2015
Cited By (1)
US 12,644,989