IP Library Granted Patent US 9,898,388
Granted Patent B2
US 9,898,388 · App. 14/721,191 · Granted Feb 20, 2018

Non-intrusive software verification

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Quick Facts
Patent No.
US 9,898,388
App. No.
14/721,191
Granted
Feb 20, 2018
Kind
B2
Abstract

This application discloses a computing system configured to simulate an embedded system including a processor capable of executing embedded software, compile the embedded software into a format capable of execution by the computing system, insert instrumentation code into the compiled embedded software, and execute the compiled embedded software and the instrumentation code. The execution of the compiled embedded software can simulate execution of the embedded software by the processor in the simulated embedded system, while the execution of the instrumentation code can configure the computing system to gather information corresponding to the execution of the compiled embedded software.

Claims (38)

1. A method comprising:

simulating, by a computing system, an embedded system including a processor capable of executing embedded software, wherein the simulating comprises:

translating, by the computing system, source code for the embedded software into a software image configured as a native instruction set for the processor in the embedded system, wherein the translating generates debug information corresponding to the software image;

compiling, by the computing system, the software image corresponding to the embedded software into a format capable of execution by the computing system;

selecting, by the computing system and based on the debug information corresponding to the software image, one or more scripts from a plurality of scripts;

inserting, by the computing system, the one or more scripts into the compiled software image at locations determined based, at least in part, on the debug information corresponding to the software image; and

executing, by the computing system, the compiled software image and the one or more scripts, wherein the execution of the compiled software image simulates execution of the embedded software by the processor in the simulated embedded system, and wherein the execution of the one or more scripts configures the computing system to gather information corresponding to execution of the embedded software.

2. The method of claim 1 , further comprising utilizing, by the computing system, the gathered information corresponding to the execution of the embedded software to trace the embedded software, profile the embedded software, determine coverage of the embedded software, or verify functionality of the embedded software.

3. The method of claim 1 , wherein the source code remains unmodified by the one or more scripts.

4. The method of claim 1 , wherein simulating the embedded system is performed by a quick emulator (QEMU) Instruction Set Simulator (ISS) supporting a bare-metal stack implemented by the computing system.

5. The method of claim 1 , wherein compiling the software image is performed with a just-in-time (JIT) compiler implemented by the computing system.

6. The method of claim 1 , wherein the one or more scripts comprise one or more Tool Command Language (TCL) scripts.

7. A system comprising:

a memory system configured to store computer-executable instructions; and

a computing system which, in response to execution of the computer-executable instructions, is configured to:

simulate an embedded system including a processor capable of executing embedded software;

translate source code for the embedded software into a software image configured as a native instruction set for the processor in the embedded system, which generates debug information corresponding to the software image;

compile the software image corresponding to the embedded software into a format capable of execution by the computing system;

select, based on the debug information corresponding to the software image, one or more scripts from a plurality of scripts;

insert the one or more scripts into the compiled software image at locations determined based, at least in part, on the debug information corresponding to the software image; and

execute the compiled software image and the one or more scripts, wherein the execution of the compiled software image simulates execution of the embedded software by the processor in the simulated embedded system, and wherein the execution of the one or more scripts configures the computing system to gather information corresponding to execution of the embedded software.

8. The system of claim 7 , wherein the computing system, in response to execution of the computer-executable instructions, is further configured to utilize the gathered information corresponding to the execution of the embedded software to trace the embedded software, profile the embedded software, determine coverage of the embedded software, or verify functionality of the embedded software.

9. The system of claim 7 , wherein the source code remains unmodified by the one or more scripts.

10. The system of claim 7 , wherein the computing system, in response to execution of the computer-executable instructions, is further configured to simulate the embedded system with a quick emulator (QEMU) Instruction Set Simulator (ISS) supporting a bare-metal stack.

11. The system of claim 7 , wherein the computing system, in response to execution of the computer-executable instructions, is further configured to compile the software image with a just-in-time (JIT) compiler.

12. An apparatus comprising a memory system storing instructions, that when executed, cause a computing system to:

simulate an embedded system including a processor capable of executing embedded software;

translate source code for the embedded software into a software image configured as a native instruction set for the processor in the embedded system, wherein the translating generates debug information corresponding to the software image;

compile the software image corresponding to the embedded software into a format capable of execution by the computing system;

select, based on the debug information corresponding to the software image, one or more scripts from a plurality of scripts;

insert the one or more scripts into the compiled software image at locations determined based, at least in part, on the debug information corresponding to the software image; and

execute the compiled software image and the one or more scripts, wherein the execution of the compiled software image simulates execution of the embedded software by the processor in the simulated embedded system, and wherein the execution of the one or more scripts configures the computing system to gather information corresponding to execution of the embedded software.

13. The apparatus of claim 12 , wherein the instructions are configured to, when executed, cause the computing system to utilize the gathered information corresponding to the execution of the embedded software to trace the embedded software, profile the embedded software, determine coverage of the embedded software, or verify functionality of the embedded software.

14. The apparatus of claim 12 , wherein the source code for the embedded software remains unmodified by the inserting of the one or more scripts.

15. The apparatus of claim 12 , wherein the instructions, when executed, cause simulation of the embedded system by a quick emulator (QEMU) Instruction Set Simulator (ISS) supporting a bare-metal stack implemented by the computing system.

16. The apparatus of claim 12 , wherein the instructions, when executed, cause the computing system to compile the software image with a just-in-time (JIT) compiler implemented by the computing system.

17. The apparatus of claim 12 , wherein the one or more scripts comprise one or more Tool Command Language (TCL) scripts.

18. The system of claim 7 , wherein the one or more scripts comprise one or more Tool Command Language (TCL) scripts.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Jun 24, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 056675/0285 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2015
From: ROZENMAN, ALEX; PILKO, VLADIMIR
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 035739/0522 →