Digital filters with memory
View Patent ↗A memory device that, in certain embodiments, includes a memory element coupled to a bit-line and a quantizing circuit coupled to the memory element via the bit-line. In some embodiments, the quantizing circuit includes an analog-to-digital converter having an input and output and a digital filter that includes memory. The input of the analog-to-digital converter may be coupled to the bit-line, and the output of the analog-to-digital converter may be coupled to the digital filter.
1. A method, comprising:
locally storing a value in internal memory of a digital filter of a quantizing circuit, wherein the internal memory of the digital filter is distinct from filtering circuitry of the digital filter;
adjusting a memory-element property of an internal data storage location that is used to store data;
reading data stored by the internal data storage location with the quantizing circuit;
determining whether the data read from the internal data storage location is generally equal to the data to be written to the internal data storage location by comparing the locally stored value in the internal memory to the data read from the internal data storage location.
2. The method of claim 1 , comprising selecting the internal data storage location from among a plurality of internal data storage locations on an electrical conductor.
3. The method of claim 1 , wherein reading comprises converting an analog signal from the internal data storage location to a pulse-density modulated bit-stream.
4. The method of claim 3 , wherein the value is a preset value that is substantially equal to the data being written times 2 m plus one-half of 2 m , where m is a number of least-significant digits of a counter that are truncated from a count produced by integrating the bit-stream.
5. The method of claim 1 , wherein the value is generally equal to the data being written.
6. The method of claim 1 , wherein locally storing the value comprises storing the value in memory of a counter as the internal memory of the digital filter.
7. The method of claim 6 , wherein the memory of the counter comprises SRAM.
8. The method of claim 6 , wherein reading comprises counting with an array of cascaded flip-flops comprised by the counter.
9. A method, comprising:
calculating a preset value based on data to be written to an internal data storage location and a signal value that indicates whether the internal data storage location stores the data to be written, wherein the signal value is independent of the data to be written;
locally storing the preset value in internal memory of a digital filter of a quantizing circuit, wherein the internal memory of the digital filter is distinct from filtering circuitry of the digital filter;
presetting a quantizing circuit according to the preset value;
adjusting a property of the internal data storage location that is used to store data;
reading a value from the internal data storage location with the quantizing circuit;
determining whether the internal data storage location stores the data to be written by determining whether the quantizing circuit outputs the signal value; and
adjusting the property of the internal data storage location a second time if the quantizing circuit does not output the signal value.
10. The method of claim 9 , comprising presetting with the quantizing circuit a second time if the quantizing circuit does not output the signal value.
11. The method of claim 9 , wherein calculating a preset value comprises multiplying the data to be written to the internal data storage location by 2 m , where m is a number of least-significant digits of an output of the quantizing circuit that are truncated.
12. The method of claim 11 , wherein calculating a preset value comprises adding plus or minus one-half of 2 m to the product of the multiplication.
13. The method of claim 9 , wherein:
calculating a preset value comprises inverting each digit of a number; and
each digit of the signal value is substantially equal to one.
14. The method of claim 9 , wherein:
calculating a preset value comprises inverting each digit of a number and adding one; and
each digit of the signal value is substantially equal to zero.
15. The method of claim 9 , wherein:
calculating a preset value comprises subtracting a number from one-half of one plus the largest value of a counter comprised by the digital filter of the quantizing circuit; and
the signal value is an output of the counter in which the most-significant digit is substantially equal to one.
16. The method of claim 9 , wherein:
calculating a preset value comprises adding a number to one-half of the largest value of a counter comprised by the digital filter of the quantizing circuit; and
the signal value is an output of the counter in which the most-significant digit is substantially equal to zero.