Hybrid on-chip and package antenna
Antenna devices, antenna systems and methods of their fabrication are disclosed. One such antenna device includes a semiconductor chip and a chip package. The semiconductor chip includes at least one antenna that is integrated into a dielectric layer of the semiconductor chip and is configured to transmit electromagnetic waves. In addition, the chip package includes at least one ground plane, where the semiconductor chip is mounted on the chip package such that the ground plane(s) is disposed at a predetermined distance from the antenna to implement a reflection of at least a portion of the electromagnetic waves.
1. A method for fabricating an antenna device comprising:
forming at least one antenna in an antenna layer structure including antenna components and a substrate material;
mounting the antenna layer structure onto a transparent support structure;
etching at least part of the substrate material to form an antenna chip layer;
attaching the antenna chip layer to a glass wafer;
releasing the transparent support structure from the antenna chip layer; and
mounting the antenna chip layer onto a carrier layer including at least one integrated ground plane.
2. The method of claim 1 , wherein the mounting comprises attaching the chip layer to the transparent support structure with a polymer adhesive that is sensitive to light at a given wavelength a (λ polymer ).
3. The method of claim 2 , wherein the releasing comprises illuminating the adhesive with said light.
4. The method of claim 1 , wherein the at least one antenna is configured to transmit electromagnetic waves with a microwave or lower wavelength (λ) and wherein the mounting comprises mounting the antenna chip layer onto the carrier layer such that the at least one ground plane is disposed at a distance (d) of between
1
20
λ
<
d
≤
1
4
λ
from the at least one antenna to implement a reflection of at least a portion of electromagnetic waves by the at least one ground plane.
5. The method of claim 4 , wherein the antenna layer structure is a semiconductor chip and wherein the carrier layer is a printed circuit board.
6. The method of claim 4 , wherein the antenna chip layer and the glass wafer attached to the antenna chip layer form a first chip, wherein the carrier layer is a second chip, wherein the mounting further comprises mounting the first chip and second chip on a circuit board such that the circuit board and the first chip are electrically connected through the second chip with at least one of a through silicon via (TSV) or a through glass via (TGV).