Semiconductor switch

1. A semiconductor switch having its first terminal and its second terminal, and configured to conduct or cutoff a signal path from its first terminal to its second terminal, the semiconductor switch comprising:

an enhancement-type first transistor arranged between the first terminal and the second terminal;

a first bias circuit connected to apply a gate voltage that corresponds to a control signal to a gate of the first transistor when a power supply voltage is supplied; and

a second bias circuit connected to apply, to the gate of the first transistor, a voltage that corresponds to a lower voltage selected from among voltages at the first terminal and the second terminal, in a no-power-supply state in which the power supply voltage is not supplied.

2. The semiconductor switch according to claim 1 , wherein the second bias circuit comprises:

a gate circuit that passes voltages at the first terminal and the second terminal in the no-power-supply state; and

a comparator circuit that applies, to the gate of the first transistor, a voltage that corresponds to a lower voltage selected from among the voltages at the first terminal and the second terminal.

3. The semiconductor switch according to claim 2 , wherein the gate circuit comprises:

a second transistor having its first electrode connected to the first terminal, its second electrode, and its gate biased so as to turn on the second transistor in the no-power-supply state; and

a third transistor having its first electrode connected to the second terminal, its second electrode, and its gate biased so as to turn on the third transistor in the no-power-supply state,

and wherein the comparator circuit selects a lower voltage from among the voltage at the second electrode of the second transistor and the voltage at the second electrode of the third transistor, and applies a voltage that corresponds to the selected voltage to the gate of the first transistor.

4. The semiconductor switch according to claim 3 , wherein the second transistor and the third transistor are each configured as a depression-type transistor,

and wherein the gates of the second transistor and the third transistor are each connected to a power supply line to which a lower-side power supply voltage is supplied, and are each connected to a ground line via a resistor.

5. The semiconductor switch according to claim 3 , wherein the comparator circuit comprises:

a first diode having its cathode connected to the second electrode of the second transistor, and its anode connected to the gate of the first transistor; and

a second diode having its cathode connected to the second electrode of the third transistor, and its anode connected to the gate of the first transistor.

6. The semiconductor switch according to claim 1 , wherein the first bias circuit adjusts the gate voltage of the first transistor according to the voltage at the first terminal and the voltage at the second terminal.

7. The semiconductor switch according to claim 1 , wherein the first bias circuit comprises:

a tracking circuit that generates a tracking voltage that follows the voltage at the first terminal and the voltage at the second terminal; and

a level shifter that shifts the level of the control signal in a binary manner to a high level voltage that corresponds to the tracking voltage or otherwise to a predetermined low level voltage.

8. A test apparatus comprising a semiconductor switch, wherein the semiconductor switch has its first terminal and its second terminal, and is configured to conduct or cutoff a signal path from its first terminal to its second terminal,

and wherein the semiconductor switch comprises:

an enhancement-type first transistor arranged between the first terminal and the second terminal;

a first bias circuit connected to apply a gate voltage that corresponds to a control signal to a gate of the first transistor when a power supply voltage is supplied; and

a second bias circuit connected to apply, to the gate of the first transistor, a voltage that corresponds to a lower voltage selected from among voltages at the first terminal and the second terminal, in a no-power-supply state in which the power supply voltage is not supplied.