IP Library Granted Patent US 9,494,626
Granted Patent B2
US 9,494,626 · App. 14/729,485 · Granted Nov 15, 2016

Constant period signal monitoring circuit and load control backup signal generating circuit

Inventor: Kazuhisa Wataru (Makinohara, JP)
Assignee: YAZAKI CORPORATION
G01R23/02H03K17/56Y02T10/40
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Quick Facts
Patent No.
US 9,494,626
App. No.
14/729,485
Granted
Nov 15, 2016
Kind
B2
Abstract

A constant period signal monitoring circuit for monitoring a constant period signal that is output periodically when a control processor operating according to a program is normal, includes a signal input terminal that receives the constant period signal, an edge detection section that detects a change of the constant period signal appearing at the signal input terminal from a low level to a high level or from a high level to a low level as an edge of the constant period signal, and a time measuring section that measures a length of the time during which a state of not detecting the edge continues on the basis of an output of the edge detection section and outputs an abnormality detection signal in a case that the measured time exceeds a threshold value.

Claims (25)

1. A constant period signal monitoring circuit for monitoring a constant period signal that is output periodically when a control processor operating according to a program is normal from the outside of the control processor, the monitoring circuit comprising:

a signal input terminal that receives the constant period signal;

an edge detection section that detects a change of the constant period signal appearing at the signal input terminal from a low level to a high level or from a high level to a low level as an edge of the constant period signal; and

a time measuring section that measures a length of the time during which a state of not detecting the edge continues on the basis of an output of the edge detection section and outputs an abnormality detection signal in a case that the measured time exceeds a threshold value.

2. The constant period signal monitoring circuit according to claim 1 , wherein the edge detection section comprises:

a positive edge detection section that detects the change of the constant period signal appearing at the signal input terminal from the low level to the high level as a positive edge of the constant period signal; and

a negative edge detection section that detects the change of the constant period signal appearing at the signal input terminal from the high level to the low level as a negative edge of the constant period signal; and

wherein the time measuring section measures a length of the time during which a state of not detecting the positive edge and the negative edge continues on the basis of an output of the positive edge detection section and an output of the negative edge detection section and outputs the abnormality detection signal in the case that the measured time exceeds the threshold value.

3. The constant period signal monitoring circuit according to claim 2 , wherein the time measuring section comprises a clear signal generating section that generates a signal for clearing the measured time when the positive edge detection section detects the positive edge or when the negative edge detection section detects the negative edge.

4. The constant period signal monitoring circuit according to claim 2 , wherein the positive edge detection section outputs a positive edge pulse signal when the detection section detects the positive edge; and

wherein the negative edge detection section outputs a negative edge pulse signal when the detection section detects the negative edge.

5. The constant period signal monitoring circuit according to claim 4 , wherein the positive edge detection section comprises:

a first flip-flop that is set when the detection section detects the positive edge; and

a first delay circuit that automatically resets the first flip-flop after the first flip-flop is set; and

wherein the negative edge detection section comprises:

a second flip-flop that is set when the detection section detects the negative edge; and

a second delay circuit that automatically resets the second flip-flop after the second flip-flop is set.

6. The constant period signal monitoring circuit according to claim 2 , wherein the time measuring section comprises:

a clock generating section that outputs clock pulses having a constant period; and

a counter that counts the number of the clock pulses.

7. A load control backup signal generating circuit for supplying a backup control signal to a switch of a load connected to an output of a control processor operating according to a program in a case that abnormality occurs in the control processor, the circuit comprising:

a signal input terminal that receives a constant period signal that is output periodically when the control processor is normal;

an edge detection section that detects a change of the constant period signal appearing at the signal input terminal from a low level to a high level or from a high level to a low level as an edge of the constant period signal;

a time measuring section that measures a length of the time during which a state of not detecting the edge continues on the basis of an output of the edge detection section and that outputs an abnormality detection signal in a case that the measured time exceeds a threshold value; and

a backup signal output section that generates the backup control signal when the abnormality detection signal appears at the output of the time measuring section.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2015
From: WATARU, KAZUHISA
To: YAZAKI CORPORATION
Reel/Frame 035777/0691 →
Priority Claims (1)
JP 2014-118840 · Jun 9, 2014 · national
Continuity (1)
Related Publication 20150355250A1 · Dec 10, 2015