IP Library Granted Patent US 9,607,928
Granted Patent B2
US 9,607,928 · App. 14/729,729 · Granted Mar 28, 2017

Method and structures for via substrate repair and assembly

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Quick Facts
Patent No.
US 9,607,928
App. No.
14/729,729
Granted
Mar 28, 2017
Kind
B2
Abstract

A component can include a substrate having an opening extending between first and second surfaces thereof, and an electrically conductive via having first and second portions. The first portion can include a first layer structure extending within the opening and at least partially along an inner wall of the opening, and a first principal conductor extending within the opening and at least partially overlying the first layer structure. The first portion can be exposed at the first surface and can have a lower surface located between the first and second surfaces. The second portion can include a second layer structure extending within the opening and at least partially along the lower surface of the first portion, and a second principal conductor extending within the opening and at least partially overlying the second layer structure. The second portion can be exposed at the second surface.

Claims (17)

1. A method of fabricating a component, comprising:

forming a first layer structure being electrically conductive and extending within an opening in a substrate, the opening extending from a first surface of the substrate towards a second surface opposite from the first surface, the opening having an inner wall extending away from the first surface and a bottom remote from the first surface, a dielectric material being exposed at the inner wall, the first layer structure extending at least partially along the inner wall, the first layer structure contacting the dielectric material exposed at the inner wall, the first layer structure having a lower edge located between the first and second surfaces of the substrate;

exposing the opening at the second surface of the substrate by processing applied to the substrate from above the second surface;

forming a second layer structure in contact with the lower edge of the first layer structure and in contact with a portion of the dielectric material exposed at the inner wall, the second layer structure being electrically conductive and extending at least partially along the inner wall; and

forming a principal conductor at least partially overlying the first layer structure and the second layer structure, the principal conductor being exposed at the first and second surfaces of the substrate.

2. The method as claimed in claim 1 , wherein the principal conductor is formed conforming to a contour of the first and second layer structures within the opening, the principal conductor defining an aperture extending therethrough between the first and second surfaces of the substrate.

3. The method as claimed in claim 2 , further comprising forming a barrier layer overlying an exposed surface of the aperture.

4. The method as claimed in claim 1 , further comprising, before the step of forming the first layer structure, forming the opening extending from the first surface of the substrate towards the second surface.

5. The method as claimed in claim 1 , wherein the substrate consists essentially of the dielectric material.

6. The method as claimed in claim 1 , wherein the substrate consists essentially of a semiconductor material, and wherein the dielectric material is a dielectric layer that overlies the semiconductor material within the opening, the dielectric layer defining the inner wall of the opening.

7. A method of fabricating a component, comprising:

forming a first layer structure extending within an opening in a substrate, the opening extending from a first surface of the substrate towards a second surface opposite from the first surface, the opening having an inner wall extending away from the first surface and a bottom remote from the first surface, the first layer structure extending at least partially along the inner wall;

exposing the opening at the second surface of the substrate by processing applied to the substrate from above the second surface;

forming a second layer structure in contact with the first layer structure, the second layer structure extending at least partially along the inner wall;

forming a principal conductor at least partially overlying the first layer structure and the second layer structure, the principal conductor being exposed at the first and second surfaces of the substrate, the principal conductor being formed conforming to a contour of the first and second layer structures within the opening, the principal conductor defining an aperture extending therethrough between the first and second surfaces of the substrate;

forming a barrier layer overlying an exposed surface of the aperture; and

forming a dielectric region within the aperture overlying the barrier layer.

Assignments (6)
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS LLC
To: ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
Reel/Frame 073508/0661 →
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS CORPORATION
To: INVENSAS LLC
Reel/Frame 073689/0793 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2015
From: UZOH, CYPRIAN EMEKA
To: INVENSAS CORPORATION
Reel/Frame 035844/0017 →