Patent Assignment
Reel/Frame 073689/0793
Change of Name
Recorded: 2025-11-24
Pages: 8
Assignor
INVENSAS CORPORATION
Executed: 2021-10-01
Assignee
INVENSAS LLC
3025 ORCHARD PARKWAY, SAN JOSE, CALIFORNIA, 95134
Covered Properties
(90)
Microelectronic Assembly with Thermally and Electrically Conductive Underfill
Structure for Microelectronic Packaging with Terminals on Dielectric Mass
Method and Structures for via Substrate Repair and Assembly
Method and Structures for Heat Dissipating Interposers
Structure for Microelectronic Packaging with Bond Elements to Encapsulation Surface
Method of Thinning a Wafer to Provide a Raised Peripheral Edge
Surface Modified Tsv Structure and Methods Thereof
Methods and Structure for Carrier-Less Thin Wafer Handling
Non-Crystalline Inorganic Light Emitting Diode
High Performance Light Emitting Diode with Vias
Microelectronic Unit and Package with Positional Reversal
Bva Interposer
Porous Alumina Templates for Electronic Packages
Capacitors Using Porous Alumina Structures
Microelectronic Elements with Master/Slave Configurability
Low Cte Interposer Without Tsv Structure
Low Cost Interposer and Method of Fabrication
Co-Support System and Microelectronic Assembly
Co-Support Component and Microelectronic Assembly
Co-Support Module and Microelectronic Assembly
Co-Support Circuit Panel and Microelectronic Packages
Retention Optimized Memory Device Using Predictive Data Inversion
Metal Pvd-Free Conducting Structures
Reconfigurable Pop
Patent:
8,786,069 →
Application:
13/898,952 →
Method of Forming a Reliable Microelectronic Assembly
Microelectronic Assemblies with Stack Terminals Coupled by Connectors Extending Through Encapsulation
Microelectronic Assemblies Having Reinforcing Collars on Connectors Extending Through Encapsulation
Embedded Packaging with Preformed Vias
Method of Forming a Wire Bond Having a Free End
Ultra High Performance Interposer
Method for Preparing Low Cost Substrates
Bowl-shaped solder structure
Interconnections for a substrate associated with a backside reveal
Co-Support for Xfd Packaging
Single Package Dual Channel Memory with Co-Support
Substrate-To-Carrier Adhesion Without Mechanical Adhesion Between Abutting Surfaces Thereof
Multiple Bond via Arrays of Different Wire Heights on a Same Substrate
Carrier-Less Silicon Interposer Using Photo Patterned Polymer as Substrate
Via Structure for Signal Equalization
Stacked Die Integrated Circuit
Batch Process Fabrication of Package-on-Package Microelectronic Assemblies
Fabrication of Microelectronic Assemblies Having Stack Terminals Coupled by Connectors Extending Through Encapsulation
Patent:
8,883,563 →
Application:
14/230,521 →
Die Stacks with One or More Bond via Arrays of Wire Bond Wires and with One or More Arrays of Bump Interconnects
Structure for Microelectronic Packaging with Bond Elements to Encapsulation Surface
Method of Fabricating Low Cte Interposer Without Tsv Structure
Non-Crystalline Inorganic Light Emitting Diode
Metal Pvd-Free Conducting Structures
Retention Optimized Memory Device Using Predictive Data Inversion
Methods and Structure for Carrier-Less Thin Wafer Handling
Method and Structures for via Substrate Repair and Assembly
Capacitors Using Porous Alumina Structures
Single Package Dual Channel Memory with Co-Support
Bowl-shaped solder structure
Reconfigurable Pop
Method of Thinning a Wafer to Provide a Raised Peripheral Edge
Microelectronic Assembly for Microelectronic Packaging with Bond Elements to Encapsulation Surface
Structures for Heat Dissipating Interposers
Co-Support for Xfd Packaging
Multiple bond via arrays of different wire heights on a same substrate
Method of Manufacturing Embedded Packaging with Preformed Vias
Porous Alumina Templates for Electronic Packages
Multiple bond via arrays of different wire heights on a same substrate
Method for Fabricating a Carrier-Less Silicon Interposer
Bva Interposer
Batch Process Fabrication of Package-on-Package Microelectronic Assemblies
Microelectronic Assemblies Having Stack Terminals Coupled by Connectors Extending Through Encapsulation
Retention optimized memory device using predictive data inversion
Substrate-to-carrier adhesion without mechanical adhesion between abutting surfaces thereof
Batch Process Fabrication of Package-on-Package Microelectronic Assemblies
Low Cost Substrates
Die Stacks with One or More Bond via Arrays of Wire Bond Wires and with One or More Arrays of Bump Interconnects
Reliable Device Assembly
Stacked Die Integrated Circuit
Interconnections for a Substrate Associated with a Backside Reveal
Method of Fabricating Low Cte Interposer Without Tsv Structure
Multiple bond via arrays of different wire heights on a same substrate
Via Structure for Signal Equalization
Method and Structures for via Substrate Repair and Assembly
Porous Alumina Templates for Electronic Packages
Ultra High Performance Interposer
Method of Fabricating a Carrier-Less Silicon Interposer Using Photo Patterned Polymer as Substrate
Method and Structures for Heat Dissipating Interposers
Porous Alumina Templates for Electronic Packages
Interconnections for a Substrate Associated with a Backside Reveal
Multiple Bond via Arrays of Different Wire Heights on a Same Substrate
Ultra High Performance Interposer
Method and Structures for Heat Dissipating Interposers
Multiple Plated via Arrays of Different Wire Heights on Same Substrate
Ultra High Performance Interposer
Interconnections for a Substrate Associated with a Backside Reveal
Related Assignments
(15)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Dec 12, 2012
From: HABA, BELGACEM; MCELREA, SIMON
To: INVENSAS CORPORATION
Reel/Frame 029488/0540 →
Assignment of Assignor's Interest
Jun 21, 2013
From: UZOH, CYPRIAN EMEKA; MONADGEMI, PEZHMAN; CASKEY, TERRENCE; AYATOLLAHI, FATIMA LINA
To: INVENSAS CORPORATION
Reel/Frame 030678/0402 →
Assignment of Assignor's Interest
Jun 26, 2013
From: UZOH, CYPRIAN EMEKA; MONADGEMI, PEZHMAN; NEWMAN, MICHAEL; WOYCHIK, CHARLES G.
To: INVENSAS CORPORATION
Reel/Frame 030710/0524 →
Assignment of Assignor's Interest
Jul 9, 2013
From: HABA, BELGACEM; AYATOLLAHI, FATIMA LINA; NEWMAN, MICHAEL; MONADGEMI, PEZHMAN
To: INVENSAS CORPORATION
Reel/Frame 030802/0580 →
Assignment of Assignor's Interest
Sep 13, 2013
From: CASKEY, TERRENCE; MOHAMMED, ILYAS; UZOH, CYPRIAN EMEKA; WOYCHIK, CHARLES G.
To: INVENSAS CORPORATION
Reel/Frame 031325/0464 →
Assignment of Assignor's Interest
Sep 18, 2013
From: WOYCHIK, CHARLES G.; UZOH, CYPRIAN EMEKA; NEWMAN, MICHAEL; CASKEY, TERRENCE
To: INVENSAS CORPORATION
Reel/Frame 031334/0128 →
Assignment of Assignor's Interest
Oct 31, 2013
From: UZOH, CYPRIAN EMEKA
To: INVENSAS CORPORATION
Reel/Frame 031552/0652 →
Assignment of Assignor's Interest
Sep 4, 2014
From: MOHAMMED, ILYAS; WANG, LIANG
To: INVENSAS CORPORATION
Reel/Frame 033672/0576 →
Assignment of Assignor's Interest
Sep 4, 2014
From: WANG, LIANG; MOHAMMED, ILYAS
To: INVENSAS CORPORATION
Reel/Frame 033672/0537 →
Assignment of Assignor's Interest
Oct 13, 2014
From: HABA, BELGACEM; FISCH, DAVID
To: INVENSAS CORPORATION
Reel/Frame 033940/0061 →
Security Interest
Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
Security Interest
Jan 2, 2018
From: SCALARC, INC.
To: PACIFIC WESTERN BANK
Reel/Frame 044517/0526 →
Security Interest
Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
Release of Security Interest
Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION
Reel/Frame 052920/0001 →
Change of Name
Nov 24, 2025
From: INVENSAS LLC
To: ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
Reel/Frame 073508/0661 →