SYSTEM ARCHITECTURE FOR MULTIPLE ANTENNA/SERVICES REMOTE RADIO HEAD
One embodiment of the present invention provides a remote radio head (RRH) for a wireless communication system. The RRH includes a first integrated circuit (IC) chip that comprises multiple functional blocks, a second IC chip that comprises at least a frequency up-converter for up-converting outputs of the DAC block to a radio frequency (RF) domain and a frequency down-converter for down-converting RF signals received from one or more antennas, and a plurality of RF front-end components that are packaged into a system in a package (SiP) module. The multiple functional blocks in the first IC chip include at least a processing unit, a digital-to-analog converter (DAC) block, and an analog-to-digital converter (ADC) block.
1 . A remote radio head (RRH) for a wireless communication system, comprising:
a first integrated circuit (IC) chip that comprises multiple functional blocks, wherein the multiple functional blocks include at least a processing unit, a digital-to-analog converter (DAC) block, and an analog-to-digital converter (ADC) block;
a second IC chip that comprises at least a frequency up-converter for up-converting outputs of the DAC block to radio frequency (RF) domain and a frequency down-converter for down-converting RF signals received from one or more antennas; and
a plurality of RF front-end components that are packaged into a system in a package (SiP) module.
2 . The RRH of claim 1 , wherein the processing unit is configured to facilitate communications between a base station and the RRH, and wherein the communications are in compliance with one of:
a Common Public Radio Interface (CPRI) protocol; and
an Open Base Station Architecture Initiative (OBSAI) protocol.
3 . The RRH of claim 1 , wherein the processing unit is configured to simultaneously process multiple streams of data in both uplink and downlink directions.
4 . The RRH of claim 3 , wherein the processing unit is configured to simultaneously process four or eight data streams in each of the uplink and downlink directions.
5 . The RRH of claim 1 , wherein the DAC block is configured to DA convert multiple data streams in parallel, and wherein the ADC block is configured to AD convert multiple signal streams in parallel.
6 . The RRH of claim 1 , wherein the first IC chip and the second IC chip are coupled via an analog interface.
7 . The RRH of claim 1 , wherein the plurality of RF front-end components includes one or more of:
a filter;
a switch;
a power amplifier; and
a low-noise amplifier.
8 . The RRH of claim 1 , further comprising an optical transceiver module situated between the first IC chip and the base station.
9 . The RRH of claim 1 , wherein the first IC chip has a channel capacity that is greater than the second IC chip, and wherein the RRH further comprises a third IC chip that is identical to the second IC chip.
10 . A system on a chip (SoC) module for application of a remote radio head (RRH), comprising:
a processing unit configured to facilitate communications between a base station and the RRH;
a digital-to-analog converter (DAC) block; and
an analog-to-digital converter (ADC) block.
11 . The SoC module of claim 10 , wherein the communications between the base station and the RRH are in compliance with one of:
a Common Public Radio Interface (CPRI) protocol; and
an Open Base Station Architecture Initiative (OBSAI) protocol.
12 . The SoC module of claim 10 , wherein the processing unit is configured to simultaneously process multiple streams of data in both uplink and downlink directions.
13 . The SoC module of claim 12 , wherein the processing unit is configured to simultaneously process four or eight data streams in each of the uplink and downlink directions.
14 . The SoC module of claim 10 , wherein the DAC block is configured to DA convert multiple data streams in parallel, and wherein the ADC block is configured to AD convert multiple signal streams in parallel.
15 . The SoC module of claim 10 , wherein the SoC module is coupled to the base station via an optical transceiver.
16 . The SoC module of claim 10 , wherein the SoC module is coupled to a radio frequency integrated circuit (RFIC) chip via an analog interface.