Semiconductor device and method of forming the same
Provided is a semiconductor device including a substrate, an insulating layer, a conductive layer and at least one spacer. The substrate has at least two shallow trenches therein. The conductive layer is disposed on the substrate between the shallow trenches. The insulating layer is disposed between the substrate and the conductive layer. The at least one spacer is disposed on one sidewall of the conductive layer and fills up each shallow trench. A method of forming a semiconductor device is further provided.
1. A semiconductor device, comprising:
a substrate, having at least two shallow trenches therein;
a conductive layer, disposed on the substrate between the shallow trenches;
an insulating layer, disposed between the substrate and the conductive layer; and
at least one spacer, disposed on a sidewall of the conductive layer and filling up each shallow trench,
wherein the shallow trenches are completely filled with the at least one spacer.
2. The semiconductor device of claim 1 , wherein the conductive layer extends to cover a portion of a bottom of each shallow trench.
3. The semiconductor device of claim 2 , wherein the conductive layer covers about 50% to 80% of the bottom of each shallow trench.
4. The semiconductor device of claim 1 , wherein each shallow trench has a depth of about 100 nm to 600 nm.
5. The semiconductor device of claim 1 , wherein each shallow trench has a width of about 0.1 μm to 0.3 μm.
6. The semiconductor device of claim 1 , wherein the at least one spacer comprises a first spacer and a second spacer, the first spacer is disposed on the sidewall of the conductive layer and on a sidewall of each shallow trench and exposes a portion of a bottom of each shallow trench, and the second spacer is disposed on the first spacer.
7. The semiconductor device of claim 6 , wherein the first spacer and the second spacer comprise different materials.
8. The semiconductor device of claim 6 , further comprising a third spacer disposed on the second spacer.
9. The semiconductor device of claim 1 , further comprising a first doped region disposed in the substrate surrounding each shallow trench.
10. The semiconductor device of claim 9 , further comprising a second doped region disposed in the first doped region at an outer side of each shallow trench.