Method of designing a template pattern, method of manufacturing a template and method of manufacturing a semiconductor device

1. A computer-implemented method of designing a template pattern used for imprint lithography, comprising:

determining, by a computer, a first area, a second area, and a third area where a dummy template pattern is to be formed, the third area being between and adjacent to the first area and the second area of a template;

generating, by a the computer, data of a the dummy template pattern to be formed in a the third area between first and second areas of a template based on data of a design pattern of the template,

the data of the dummy template pattern being generated so that a third surface area ratio showing a ratio of a surface area of the third area to an area of the third area is set to be:

smaller than a first surface area ratio showing a ratio of a surface area of the first area to an area of the first area, and

larger than a second surface area ratio showing a ratio of a surface area of the second area to an area of the second area.

2. The method according to claim 1 , wherein generating the data of the dummy template pattern includes:

calculating the first surface area ratio based on the data of the design pattern;

calculating the second surface area ratio based on the data of the design pattern; and

generating the data of the dummy template pattern based on the first and second surface area ratios.

3. The method according to claim 1 , wherein the first area is included in a chip area.

4. The method according to claim 1 , wherein the second area is included in an interchip area.

5. The method according to claim 1 , wherein the second area has no pattern.

6. The method according to claim 1 , wherein a pitch of between a dummy template pattern of the third area is larger than that a width of a dummy template pattern of the first third area.

7. The method according to claim 1 , wherein a width of a dummy template pattern of the third area is larger than that of a template pattern of the first area.

8. The method according to claim 1 , wherein the surface area ratio of the third area is constant.

9. The method according to claim 1 , wherein the surface area ratio of the third area changes.

10. The method according to claim 1 , wherein the third area includes a first sub-area and a second sub-area between the second area and the first sub-area, and

a fourth surface area ratio showing a ratio of a surface area of the first sub-area to an area of the first sub-area is smaller than the first surface area ratio, and

a fifth surface area ratio showing a ratio of a surface area of the second sub-area to an area of the second sub-area is smaller than the fourth surface area ratio, and larger than the second surface area ratio.

11. The method according to claim 1 , wherein the surface area ratio of the third area decreases from the first area toward the second area.

12. A method of manufacturing a template, comprising:

forming a template pattern designed using the method according to claim 1 in a template substrate.

13. A method of manufacturing a semiconductor device, comprising:

transferring a pattern formed in the template manufactured using the method according to claim 12 to an imprint material layer on a substrate.

14. A computer-implemented method of designing one or more template patterns used for imprint lithography, comprising:

determining, by a computer, an area of a first region, an area of a second region, and an area of a third region where a template pattern is to be formed, the third region being between and adjacent to the first region and the second region of a template;

generating, by the computer, data of the template pattern to be formed in the third region based on data of a design pattern of the template;

wherein the first region, the second region, and the third region are associated respectively with a first surface area ratio, a second surface area ratio, and a third surface area ratio;

and wherein the third surface area ratio is smaller than the first surface area ratio and larger than the second surface area ratio,

wherein the first region is included in a chip area, and the second region is included in an interchip area between the chip area and another chip area, and the third region is included in the interchip area.

15. The method of claim 14, wherein generating the data of the template pattern includes:

calculating the first surface area ratio and the second surface area ratio after determining the area of the first region, the area of the second region, and the area of the third region; and

determining the template pattern of the third region based on the calculated first surface area ratio and the calculated second surface area ratio.

16. The method of claim 14, wherein the first region is included in a chip area.

17. The method of claim 14, wherein the second region and the third region are included in an interchip area.

18. The method of claim 14, wherein the second region has no pattern.

19. The method according to claim 14, wherein a third pitch between the template pattern to be formed in the third region is larger than a first pitch between a template pattern of the first region.

20. The method according to claim 14, wherein a third width of the template pattern to be formed in the third region is larger than a first width of a template pattern of the first region.

21. The method according to claim 14, wherein the template pattern to be formed in the third region includes a first sub-region and a second sub-region; wherein the first sub-region is associated with a first sub-region surface area ratio; wherein the second sub-region is associated with a second sub-region surface area ratio; wherein the first sub-region surface area ratio is different from the second sub-region surface area ratio.

22. The method according to claim 21, wherein the second sub-region is to be formed between the second region and the first sub-region; wherein the first sub-region surface area ratio is smaller than the first surface area ratio; and wherein the second sub-region surface area ratio is smaller than the first sub-region surface area ratio.

23. The method according to claim 22, wherein the second sub-region surface area ratio is larger than the second surface area ratio.

24. The method according to claim 14, wherein the template pattern to be formed in the third region includes a dummy template pattern.

25. A method of manufacturing a template, comprising:

forming at least one of the one or more template patterns designed using the method of claim 14 in a template substrate.

26. A method of manufacturing a semiconductor device, comprising:

transferring one or more patterns formed in the template manufactured using the method according to claim 25 to an imprint material layer on a substrate.

27. A computer-implemented method of designing one or more template patterns used for imprint lithography, comprising:

determining, by a computer, an area of a first region, an area of a second region, and an area of a third region where a template pattern is to be formed, the third region being between and adjacent to the first region and the second region of a template;

generating, by the computer, data of the template pattern to be formed in the third region based on data of the design pattern of the template;

wherein the first region, the second region, and the template pattern to be formed in the third region are associated respectively with a first density, a second density, and a third density; and

wherein the third density is smaller than the first density and larger than the second density.